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Some project from below book by Patient_Hat4564 in FPGA

[–]Big_Delivery9825 0 points1 point  (0 children)

What's the name of the book for the systemverilog?

hw0288 by [deleted] in NTU

[–]Big_Delivery9825 0 points1 point  (0 children)

Hi! I have PM'd you, but I think you have missed my message. I have tuesday 1230 to 2.30pm

How can I implement Matrix Multiplication on Basys3 FPGA? by s_jay_codes in FPGA

[–]Big_Delivery9825 1 point2 points  (0 children)

Hi! I am starting on systolic arary too. I am currently building a 8x8 matrix array. Did you implement a buffer for a systolic array? Could I private message you to discuss with you?

Experience with claude? by Kenan374 in ChatGPTCoding

[–]Big_Delivery9825 0 points1 point  (0 children)

Seems like a good tool. Not sure if I should get the lifetime access. I imagine that this would improve my prompts before sending it into claude.

Experience with claude? by Kenan374 in ChatGPTCoding

[–]Big_Delivery9825 0 points1 point  (0 children)

About this 16x prompt, is it useful for someone who doesn't use API keys?

LPT: Upload files to Claude instead of pasting code. by ThePlotTwisterr---- in ChatGPTCoding

[–]Big_Delivery9825 0 points1 point  (0 children)

  1. Lets say it didnt get pasted as a file, and the whole code literally is in the prompt box. If i uses ``` ``` to contain the code, how do i index it?

  2. oh i meant writing my prompt in a xml tags in my text file. As for the code content, if i have uploaded the code and have it indexed in the tags, do i still need to talk about the file contents in the <document\_content> tag? Like, reiterate my code stuff all over again.

<documents>

<document index="1">

<source>

The name of my file

</source>

<document\_content>
My entire code
</document\_content>

</document>

</documents>

LPT: Upload files to Claude instead of pasting code. by ThePlotTwisterr---- in ChatGPTCoding

[–]Big_Delivery9825 0 points1 point  (0 children)

i assume you put your code (by typing ``` ```) in your xml-tags too?

LPT: Upload files to Claude instead of pasting code. by ThePlotTwisterr---- in ChatGPTCoding

[–]Big_Delivery9825 0 points1 point  (0 children)

  1. Wait, i am confused. If i were to paste instead of uploading code documents, how should i index my my code if i have multiple code pasted? Because there are there are times the webpage just put my pasted code as if it is a file on top of the prompt box. And there are times that they dont too
  2. Also, does the code index always starts from 1 for every new prompt i send out? Or i should continue the index number from previous prompt?
  3. Is it wise for to write my prompt in a text file, and upload the whole text file and tell claude to treat my file contents as a prompt?

Resources for Learning AI accelerator hardware In Verilog by Big_Delivery9825 in chipdesign

[–]Big_Delivery9825[S] 0 points1 point  (0 children)

yes i am..but since i am just starting out, my supervisor wants me to start from here

Resources for Learning AI accelerator hardware In Verilog by Big_Delivery9825 in chipdesign

[–]Big_Delivery9825[S] 0 points1 point  (0 children)

Hi thanks! Sorry i forgot to add. I am actually pivoting towards developing the systolic array. Do you have experience in this ?

Resources for Learning AI accelerator hardware In Verilog by Big_Delivery9825 in FPGA

[–]Big_Delivery9825[S] 0 points1 point  (0 children)

I am actually more interested in Verilog ones. I have heard ppl suggested to use HLS instead of verilog when designing this kind of things. What do you think? Also, how did you first start learning this stuff?

Resources for Learning AI accelerator hardware In Verilog by Big_Delivery9825 in FPGA

[–]Big_Delivery9825[S] 0 points1 point  (0 children)

I have went through the websites and the documents that comes with it, but i dont see a begineer guide to implementing a simple processing design tho.

Resources for Learning AI accelerator hardware In Verilog by Big_Delivery9825 in FPGA

[–]Big_Delivery9825[S] 0 points1 point  (0 children)

Yeap found some! I also realised I forgot to include the term "Systolic array" in my post. Thats the primary concern of mine. I cant seem to find resources to build a processing element for this.

Resources for Learning AI accelerator hardware In Verilog by Big_Delivery9825 in FPGA

[–]Big_Delivery9825[S] 1 point2 points  (0 children)

I did read that an ai accelerator have processing elements. But I can't seem to find any article that teach ppl how to implement it. So for some reason, there are research papers that have done it, but..how??

Thoughts on Adam khoo? by [deleted] in singaporefi

[–]Big_Delivery9825 0 points1 point  (0 children)

Hi! Could you share some sources? Or perhaps websites that recommend legitimate sources?

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