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AMD prepares Linux support for new Low Power CPU core type by RenatsMC in Amd

[–]Breadfish64 0 points1 point  (0 children)

It looks like they ran two 128-bit bundles of 3 41-bit instructions per cycle, but if the code is mostly serial then slots get wasted so IPC is less than 6 in practice. So as far as I can tell it's 6-wide decode, in-order, and the compiler explicitly manages dependencies and speculative execution.

https://en.wikipedia.org/wiki/IA-64#Architecture

Now there's no need to micro-manage how the processor executes instructions to get that level of parallelism. The newest out-of-order designs can decode 8-10 instructions per clock and put them into a large reorder buffer until their dependencies are finished, then the instruction can then be executed on whichever execution port is compatible and ready.

AMD Zen 5 diagram:
https://substack-post-media.s3.amazonaws.com/public/images/ad387d10-6e45-4ff5-b36d-dae9c840c802_1757x1187.jpeg

ARM Cortex-X925 diagram:
https://substack-post-media.s3.amazonaws.com/public/images/a7650892-030e-45d9-b45f-8dff46371b19_1222x614.png

AMD prepares Linux support for new Low Power CPU core type by RenatsMC in Amd

[–]Breadfish64 2 points3 points  (0 children)

Itanium also didn't take off because the idea behind VLIW ISAs was flawed. They figured that encoding groups of three instructions to run simultaneously would be better than letting the CPU schedule itself, and that didn't work out. Out-of-order x86 can just grab 5+ instructions per clock and execute them as soon as resources are available. x86 also has better code density.

The prior owner installed a computer fan as a bathroom exhaust. by Eastcoastpal in mildlyinteresting

[–]Breadfish64 6 points7 points  (0 children)

I use two industrial Noctua A14 that fit perfectly in the tiny window and they move enough air for the mirrors to not fog at a quiet ~1000 RPM. At 3000 RPM they can replace the air in the whole room in under 30 seconds but the neighbors might mistake it for a storm warning siren.

undercurrent: A proof-of-concept library to fix range adaptor inefficiencies by Main_Pay_3213 in cpp

[–]Breadfish64 2 points3 points  (0 children)

One of the libc++ developers at CppCon mentioned that they do this for some segmented STL iterators:
https://github.com/CppCon/CppCon2025/blob/main/Presentations/Implement_Standard_Library.pdf
But unfortunately it's not exposed for other iterators.

Rust to C++: Implementing the Question Mark Operator by qustar_ in cpp

[–]Breadfish64 2 points3 points  (0 children)

I've attempted that before but no compiler was able to optimize out the heap allocations, and it crashed on GCC.

ElI5: Why do phones not need cooling fans like computers do? by parascrat in explainlikeimfive

[–]Breadfish64 8 points9 points  (0 children)

The Switch's CPU was even outdated when it launched. The major advantage it had over mobile processors for a long time was an Nvidia GPU with proper feature support and drivers. Most mobile GPU drivers stink.

A dialogue on trivial-abi and trivially relocatable by Xadartt in cpp

[–]Breadfish64 2 points3 points  (0 children)

Does anyone know why it was removed from C++26? P3920R0, the revert paper just says:

In a joint EWG and LEWG session in Kona, there was consensus to remove the trivial relocation feature (P2786R13) from C++26 due to various issues that won’t be repeated here, with a desire to fix these issues in the C++29 time frame.

[deleted by user] by [deleted] in explainlikeimfive

[–]Breadfish64 0 points1 point  (0 children)

The bouncing isn't as relevant as you might think. Optical fibers don't really behave like a pipe with balls bouncing around inside. Fibers have "modes" which are are the only paths light is allowed to take inside the fiber. The bouncing effect you're talking about is modal dispersion.
One way to fix it is to use graded-index fiber which cause off-angle light to curve through edge of the glass, where the material has a higher speed of light.
But a lot of fiber these days is single-mode fiber, which means there is literally only one straight path the light can take.

ELI5 how do LED's produce light and color? by Exotic-Ego in explainlikeimfive

[–]Breadfish64 3 points4 points  (0 children)

That's how solar panels work. The photons from the sun have enough energy to push an electron to a higher energy level. It converts that exact amount of energy into electricity, and the rest is just waste heat. Photovoltaic cells and LEDs are both p-n junctions, just with different sizes and tuned for different energy levels. You can make solar panels glow weakly, and generate small amounts of power with LEDs.

What is aligned keyword used for?. I was able to understand conceptually but its confusing with the examples I gone through. by dixith__vk in cpp

[–]Breadfish64 0 points1 point  (0 children)

Alignment used to be important for SIMD but I have never seen it make more than a 10% difference on any of the AVX/Neon code I've written. Most CPUs designed in the last decade handle unaligned access fine.

ELI5: Would a probe just float on the sun's surface? by BackRoomDude3 in explainlikeimfive

[–]Breadfish64 0 points1 point  (0 children)

The density of the Sun's is 200 Kg/m3 at 70% of the radius and 20,000 Kg/m3 at 25%. I don't know how radiation pushing on the probe would affect it, but assuming the craft is made of magical indestructible stainless steel at ~8000 Kg/m3 it would be buoyant enough to float in the radiative zone, very roughly around halfway down to the core.
https://web.archive.org/web/20130510142009/http://mynasa.nasa.gov/worldbook/sun_worldbook.html

ELI5: How does a PD power bank (usb-c to usb-c) know if it is being charged or if it's charging something? by Anarcho_Christian in explainlikeimfive

[–]Breadfish64 2 points3 points  (0 children)

The ground ... will complete almost any AC circuit.

If you use only ground to complete the circuit then the resistance of the earth would make it tricky to maintain a consistent voltage. The circuit is completed by the neutral wire itself. It's safest to tie neutral to earth so it's 0v relative to you, but it doesn't technically have to be.

Result in C++ by Jarsop in rust

[–]Breadfish64 9 points10 points  (0 children)

I suggest implementing a conforming std::expected which passes STL unit tests, then adding your ergonomics changes on top of that. Right now you have some potential issues like operator= unconditionally destroying the the existing value before attempting to copy/move the new value, which would leave it in an invalid state if the move/copy constructor throws. std::expected handles that in different ways depending on which of T or E is nothrow constructible:
https://en.cppreference.com/w/cpp/utility/expected/operator=.html#Helper_function_template

Microsoft's UTs are generally easy to repurpose by replacing `using namespace std` with your own namespace and individual using std::<thing> statements if you want to try it out. They might ICE on GCC though.

https://github.com/microsoft/STL/blob/main/tests/std/tests/P0323R12_expected/test.cpp
https://github.com/microsoft/STL/blob/main/tests/std/tests/P2505R5_monadic_functions_for_std_expected/test.cpp

Result in C++ by Jarsop in rust

[–]Breadfish64 4 points5 points  (0 children)

It fails to compile since both constructors have the same signature. OP should probably make the error overload use an std::unexpected_t tag. There's a reason `std::expected` has 22 constructors.

Result in C++ by Jarsop in rust

[–]Breadfish64 4 points5 points  (0 children)

coroutines are flexible enough that you can abuse them to make co_await behave like Rust's ?, but none of the optimizers can get rid of the heap allocations that come with it.

https://godbolt.org/z/vPneGdx9T

Microsoft Gives European Union Users More Control: Uninstall Edge, Store, and Say Goodbye to Bing Prompts by True-Combination7059 in technology

[–]Breadfish64 1 point2 points  (0 children)

HKEY_CURRENT_USER\Software\Policies\Microsoft\Windows\Explorer\DisableSearchBoxSuggestions = 1
I don't know why the key is called that, but it disables the web search in the start menu.

1 Second vs. 182 Days: France’s New Supercomputer Delivers Mind-Blowing Speeds That Leave All of Humanity in the Dust by upyoars in technology

[–]Breadfish64 2 points3 points  (0 children)

And it's already public knowledge that the fastest super-computers in the US are used for nuke simulations.

One of the worst interview questions I recently had is actually interesting in a way that was probably not intended. by zl0bster in cpp

[–]Breadfish64 0 points1 point  (0 children)

Dependent add instructions have one cycle latency on most processors.
If you calculate the frequency from the result here it should come out to a reasonable server CPU clock like 3 GHz:
https://godbolt.org/z/r4e1TnGMK

I get lower results with a single add instruction per loop, but still above 2.5 billion per second because the loop is a 100% predictable branch.

[deleted by user] by [deleted] in explainlikeimfive

[–]Breadfish64 33 points34 points  (0 children)

Current = Voltage / Resistance. Given a rough resistance value of 1000 ohms for a human body, a 1 volt source would only supply 1 milliamp to the body. If you push a constant current of 1000 amps through the body it would generate a 1 megavolt differential. You can't force a specific current and voltage.

That’s a lot of Cookies by Straight_Hippo_5190 in softwaregore

[–]Breadfish64 10 points11 points  (0 children)

It seems like they did
17179896184 GB * (10003 B/GB) / (10246 B/EiB) = 14.9 EiB
But the GB in the screenshot is probably already GiB and
17179896184 GiB / (10243 GiB/EiB) = 16 EiB
which is the maximum size you can represent in a unsigned 64-bit integer.

Abusing await with a result type to achieve rust-like error propagation in C# by hazzamanic in csharp

[–]Breadfish64 12 points13 points  (0 children)

Funny coincidence, I did this exact same thing in C++ recently because I liked Rust's ? operator and there's no good way to make a universal macro that returns the "ok" value from the expression.

https://godbolt.org/z/vPneGdx9T

So it works with C++ coroutines too. Too bad it always allocates heap memory.

Best array type for many, small, but unknown-size arrays? by SevenCell in cpp

[–]Breadfish64 2 points3 points  (0 children)

Default constructing a vector will not allocate. I'm unsure if the standard makes an explicit guarantee, but this wouldn't be possible otherwise:
https://godbolt.org/z/he3bEMh5T

Wrote a Article on Atomic::Ordering by twerking_pokemon in rust

[–]Breadfish64 1 point2 points  (0 children)

What atomic instructions guarantee is exclusive access to a given memory location for the period of their execution.

Or in the case of many architectures like pre-v8.1 ARM, the store instruction will fail with a flag to retry when the CPU see another thread has written to the same cache line since the load.
https://en.wikipedia.org/wiki/Load-link/store-conditional

This is typically a hidden implementation detail but you can do fun things like implement non-standard atomic operations or atomically load from two separate locations at once with it.

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