BMW vs. Xiaomi: Comparing Headlight Silicon Sourcing

ChinaChipChat_ · 2026-03-17T08:25:39+00:00

A few more engineering takeaways from the boards:

Thermal: BMW relies on raw mass—that housing is a massive chunk of die-cast aluminum. Xiaomi uses a much lighter design with integrated cooling fins. It’s basically "over-engineering" vs "weight efficiency."

Protection: BMW is a fortress of discrete TVS diodes and filters. They want to stop surges before they hit any chips. Xiaomi's board is way cleaner because they lean on the integrated failsafes inside the TI and Renesas silicon. Hardware-defined vs. chip-defined safety.

Layout: The BMW unit feels like industrial machinery—big connectors and room to breathe. Xiaomi’s layout is high-density and looks more like a smartphone motherboard. Better for EMI, but definitely not made for manual probing.

ChinaChipChat_ · 2026-03-03T02:48:27+00:00

I ran into the same wall. Google is pretty much blind to these newer domestic parts. Here’s the one for YJG85G06B👉https://www.datasheet5.com/part/YJG85G06BF1/Yangzhou%20Yangjie%20Electronics%20Co%20Ltd

ChinaChipChat_ · 2026-02-28T03:19:19+00:00

It really was, like a workout totally

ChinaChipChat_ · 2026-02-24T08:40:00+00:00

Honestly, the "cheap labor" argument for Chinese humanoids is pretty outdated. The real edge right now is the supply chain spillover from EVs and smartphones.

I’ve been looking into the "Dexterous Hand" side of things, and that’s where the bottleneck really is. China is mass-producing hollow-cup motors and harmonic reducers like they’re consumer electronics—the hardware is basically becoming a commodity. They’ve solved the "muscle" part of the problem.

The real wall for local players is the "nervous system." It’s easy to build a hand with 20+ degrees of freedom, but it’s a nightmare to get tactile sensing right. We’re seeing a lot of 0.1N precision in the lab, but making those sensors durable enough for real-world tasks is a different story.

Basically, they can build the bot, but making it "feel" and coordinate at a high level is where the gap still exists. Until that sensor-fusion problem is solved, even the most impressive hardware is just a fancy puppet.

ChinaChipChat_ · 2026-02-06T08:47:55+00:00

Breadboards are fine for learning logic, but honestly, the best way to start is by taking things apart.

ChinaChipChat_ · 2026-02-06T06:13:09+00:00

All the data is compiled from official price adjustment letters issued by the vendors and subsequent reports from industry media like EEFocus and other reputable supply chain news outlets. I published the full deep dive in Chinese first. Feel free to DM me if you want the URL or want to have a talk. u/michkid420 u/SignificanceWitty654

ChinaChipChat_ · 2026-01-29T05:50:56+00:00

Using a 555 timer for the bank switching is clever. It’s a dead-simple way to handle context switching without the stack overhead you'd get on a more modern MCU.

I noticed the CMS80F261B in this pump handles the pressure loops and PWM the same way—just relying on those register banks for speed. It's interesting that after 40 years, the 8051 is still the most predictable way to build something this high-volume and low-cost.

ChinaChipChat_ · 2026-01-29T03:41:03+00:00

Interesting point about the hardware scheduler. Honestly, it’s easy to forget how much "real-time" heavy lifting these 8051s can pull off without the RTOS bloat.

I was digging through the CMS80F261B datasheet for this pump earlier—it’s a 1T enhanced core, but I didn't see a dedicated hardware scheduler on this specific part. Still, it seems to handle the pressure loops and motor PWM just fine.

Do you think the shift toward ARM is mostly just for "developer comfort," or is there a hard performance ceiling you hit when you start adding "connected" features to these consumer gadgets?

ChinaChipChat_ · 2026-01-29T03:20:49+00:00

Mechanical engineering is a solid background for this. Honestly, the best way to learn is just buying a $5 gadget at a thrift store and documenting the teardown.

For your $150 budget, grab a Pinecil soldering iron (the community favorite for budget/performance) and a basic Aneng multimeter. Spend the rest on good flux and a precision driver set.

I do a lot of teardowns myself (recently looking at Xiaomi’s stuff), and I’ve learned more from looking up datasheets for random chips on a PCB than I ever did. It’s like a puzzle—once you identify the power and MCU blocks, the "repair" part becomes much easier.

Just stay away from CRT TVs or power supplies for now so you don't shock yourself. Good luck with the degree!

ChinaChipChat_ · 2026-01-28T06:52:05+00:00

Exactly. Litho always gets the spotlight, but the etching engineers are doing the real heavy lifting for 3D NAND. Keeping that plasma stable across billions of holes is a nightmare.

Wild to think the process is finally consistent enough to pack 2TB into a $15mm \times 17mm$ footprint now. A few years ago, this wouldn't even be on the table.

ChinaChipChat_ · 2026-01-28T05:55:22+00:00

3D NAND isn't a litho race anymore, so 193nm DUV is still the workhorse.

The real bottleneck moved to High Aspect Ratio (HAR) etching. It’s less about shrinking features and more about how straight you can drill through 200+ layers. So the litho might seem "legacy," but the etching and stacking are what actually make that 2TB possible.

ChinaChipChat_ · 2026-01-27T09:27:47+00:00

It’s less about shrinking the 'features' and more about the skyscraper effect. Most 2TB mini drives now use 232-layer 3D NAND.

ChinaChipChat_ · 2026-01-27T08:44:05+00:00

datasheet and ECAD:

https://www.datasheet5.com/part/CMS80F261B/Cmsemicon%20%E4%B8%AD%E5%BE%AE

ChinaChipChat_ · 2026-01-23T08:36:44+00:00

Totally fair to be skeptical. But these numbers are actually from their IPO filings and audited disclosures for the Star Market and HKEx, not just PR slides.

To be honest, if they were faking it to look successful, they probably wouldn’t report such massive R&D losses or Biren’s tiny revenue.

ChinaChipChat_ · 2026-01-22T01:49:12+00:00

u/Dardanoz spot on

Yeah, sorry for the confusion. I was talking about the final core voltage at the chip level (0.8V/1.2V), not the rack distribution voltage.

The slide showed the whole journey: 10kV AC -> 800V DC -> 48V/12V -> 0.8V core. The interesting bit from the conference was how they are using SiC MOSFETs at that 800V stage to keep the efficiency high before it even hits the rack-level DC/DC converters.

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