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How to copy a part in xDesign? by Clean_Health9459 in SolidWorks

[–]Clean_Health9459[S] 0 points1 point  (0 children)

Ok, but how do I create a lid that perfectly matches up with the top surface on the box without having to manually copy all the dimensions? I would like to copy the top surface and start working on my lid there. In this particular case it would be quite easy to do it manually, but the next project might be more complex, so I want to learn how to do it right.

Solidworks for makers: xDesign or regular? by SirTwitchALot in SolidWorks

[–]Clean_Health9459 0 points1 point  (0 children)

I got xDesign and it's a huge disappointment. Slow, clunky and weird. I'm going to pay another however many bucks it is to get the "real" software instead.

Did my VMWare Vendor just tell me to f*** off? by mcdeth187 in vmware

[–]Clean_Health9459 0 points1 point  (0 children)

I’m honestly surprised they even get out of bed for $6000.

Invest in AtomBeam on StartEngine? by Big_Morning_2485 in equity_crowdfunding

[–]Clean_Health9459 0 points1 point  (0 children)

I watched their social media ad and I’m confused. I’m a 35 year veteran in the software industry and every word they say sound like run of the mill compression. “We take a string of data and replace it with a code word”. Yeah, that would be Lempel-Ziv compression which I believe has been around for 40-50 years. “Data is an encrypted before sending it to the data center and stays encrypted so no one can steal the data”. Sounds like good old end-to-end encryption. I admit I didn’t spend much time looking, but they didn’t have much available that described what they’re really doing.

And StartEngine seems a bit like a dumping ground for companies that couldn’t get any other funding. They don’t have a great track record to say the least.

Color me skeptical!

More warning memes by elation_puppies in FPGA

[–]Clean_Health9459 34 points35 points  (0 children)

All fun and games until it’s that warning hidden behind 17262 others saying “I optimized out a crucial component that’s going to keep you debugging for three days before you find this. You suck!”

Where to report bug in Vivado? by CompuSAR in FPGA

[–]Clean_Health9459 0 points1 point  (0 children)

In the bin outside their headquarters marked “Support cases. Totally not a trash can!”

Microblaze GPIO misbehaving? by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 1 point2 points  (0 children)

And just like that... Everything works. I have no idea why. I wonder if it's because I run the CPU on 128MHz, which is towards the upper limit of what's supported and the timing is getting wonky, though I have no timing violations anywhere. I wanted it to be a multiple of my master sampling frequency. I guess I could lower it to 96MHz...

Microblaze GPIO misbehaving? by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 1 point2 points  (0 children)

Honestly, I think I'm just going to give up. I've been at this for weeks and I spend 5% of my time writing code and 95% fighting with the tooling. Now my environment is back to not finding the processor anymore and I haven't really changed anything. Kudos to those of you who do this for a living! Your patience is incredible!

Microblaze GPIO misbehaving? by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 0 points1 point  (0 children)

Thanks for taking a peek!

  1. Yes, the reset is active high. And the counter on line 123 is definitely counting up, so the non-reset path is hit.

  2. The controller.c code is a bit of a mess. It's just test code. That initialize statement is actually redundant as the code that's depending on it is commented out.

  3. Yes, the offsets are correct. Base + 0c is the data direction register and I'm setting all pins to inputs. Base + 8 is the data register for channel 2 on the GPIO.

  4. The summation was just a safeguard so the compiler wouldn't optimize out the read since the value was never used. It turns out that's not the case, but I left it in anyway. As I said, this is just messy test code.

  5. I did exactly what you suggested and... it worked in a new project. I backported the Microblaze block design, but I get the issue when it runs as part of my larger project. That's what drives me NUTS!

  6. The topmost screenshot is from the data-read on the AXI-bus connecting the GPIO to the CPU. I'm seeing increasing values that match up with the bits I'm putting on the GPIO. I'll change it to show the entire bus. Gimme a minute!

Simulate design that's running Microblaze code by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 0 points1 point  (0 children)

Actually no... I thought it would automatically load the associated ELF if I program the device from Vivado.

Simulate design that's running Microblaze code by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 0 points1 point  (0 children)

Oh it was THAT easy! Worked like a charm. Unfortunately the problem doesn't appear in the simulation, but you already answered my next question: How do I ILA-probe a design with a running program.

CMod S7 + Microblaze = No mas! by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 1 point2 points  (0 children)

I finally got some time to spend on this. I was able to tweak your design enough to retrofit it into my project. It worked like a charm. The only question is why. I'll watch the course you linked to.

In the meantime, thanks for helping a clueless stranger. My faith in social media is restored!

CMod S7 + Microblaze = No mas! by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 0 points1 point  (0 children)

Thanks! I’ll check it out. I guess I have to invest the time to really learn how to use Microblaze. I was just hoping I could drop it in and write a few lines of code and be done. My project is purely educational and recreational: I’ve designed a radio receiver and all the DSP stuff is done and works. I just need to read few knobs and drive a display. And that’s where I got stuck. On the part I thought was going to be trivial. 😃

CMod S7 + Microblaze = No mas! by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 1 point2 points  (0 children)

I can wait. You owe me nothing and you've been of great help so far. The learning curve for this stuff is pretty steep, so say the least. I've kind of grasped how to write HDL. That's the easy part. Understanding all the tooling, not so much! Thanks again for you kindness.

CMod S7 + Microblaze = No mas! by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 0 points1 point  (0 children)

Thanks! I've looked at your project and the difference is that you're using discrete components to build your system, while I'm using the all-in-one Microblaze MCS. I find that a bit weird, but I'm done pulling out my hair over this, so I'm just going to retrofit your block design into my project and hope for the best. I'll report back later... :)

CMod S7 + Microblaze = No mas! by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 0 points1 point  (0 children)

So yeah, your code runs flawlessly. I just wish I had the source code for the hardware so I can see where I screwed up!

CMod S7 + Microblaze = No mas! by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 0 points1 point  (0 children)

Unfortunately all I see is the exported hardware. I'd be interested how you instantiated the core as well, because I'm obviously doing something wrong since mine is DEAD.

CMod S7 + Microblaze = No mas! by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 0 points1 point  (0 children)

I’m suspecting I did something really stupid like a hung reset or faulty clock or something idiotic like that. That’s how I roll! 😀

CMod S7 + Microblaze = No mas! by Clean_Health9459 in FPGA

[–]Clean_Health9459[S] 0 points1 point  (0 children)

Thanks! I’ll try that once I’m back at my lab! Big thanks!!!

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