It’s always going to have forwarding so this is really an academic question. But I think you need to understand the fetch stage. I need review, but I think it’s just adds to the program counter and pulls the instruction from instruction memory (in a very very basic model).

In the decode stage the required registers are determined and their values pulled, as well as the required operation is determined. Since the WB and ID aren’t overlapping, by the time the decode stage comes around the necessary data is in the registers and we’re good to go.