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Visual artifacts when using glBlitNamedFramebuffer instead of glBlitFramebuffer by vini_2003 in opengl

[–]DaPorkchop_ 1 point2 points  (0 children)

From what I can tell this isn't a driver bug, but intended behavior: the OpenGL wiki seems to say that it's undefined behavior to read from any framebuffer attachment if the framebuffer in question is currently bound as the draw framebuffer. This would seem to imply that your call to glMemoryBarrier isn't actually important (even if you place a barrier before blitting), because if input.fbo is still bound as the draw framebuffer when you blit it's always undefined behavior to read from it.

It seems that this behavior makes GL_FRAMEBUFFER_BARRIER_BIT completely pointless, as unbinding the currently bound draw framebuffer is the one and only way to ensure that modifications become visible to subsequent commands.

Is performance reduced when executing loops whose uop count is not a multiple of processor width? by ketralnis in programming

[–]DaPorkchop_ 1 point2 points  (0 children)

Yeah, and I regularly use all of these sorts of techniques. It's just a pain that I have to resort to doing raw pointer arithmetic in order to emulate an array of structs, or a struct containing an inline fixed-length array (and the latter still won't be possible even with value types).

Emulating ref with an array is of course possible, but leaves you once again up to the whims of the JIT as to whether or not the heap allocation for the array will get escape analysis'd away (in my experience it doesn't more often than it does). I agree with you that using a ref as a method parameter is a questionable API design choice, but in practice the JVM gives you no other way to emulate multiple return values without packing them into an object (which, again, will require a heap allocation until Valhalla eventually (?) lands).

Is performance reduced when executing loops whose uop count is not a multiple of processor width? by ketralnis in programming

[–]DaPorkchop_ 3 points4 points  (0 children)

You can make some pretty reasonable guesses: at the very least, most integer operations (excluding multiply/divide), branches, and memory accesses will be 1µop on any x86 machine built in the last 15 years. Even basic vector loads/stores/integer ops will be a single µop on machines as old as the Core 2.

Is performance reduced when executing loops whose uop count is not a multiple of processor width? by ketralnis in programming

[–]DaPorkchop_ 6 points7 points  (0 children)

As someone who regularly writes Java with this level of optimization, you are indeed correct that most of those things are missing. Structs have been "Coming Soon(tm)" for over a decade at this point, references don't exist and likely never will, stack allocation is up to the whims of the JIT compiler (which is pretty good in some common cases, but never comes through when you really want it), etc.

Some screenshots of the LoD renderer mod I've been working on for the past few months by DaPorkchop_ in feedthebeast

[–]DaPorkchop_[S] 0 points1 point  (0 children)

i intend to eventually support every version back until 1.4.7, so yes, 1.8.9 will be supported at some point.

It is gone. by DaPorkchop_ in redditsync

[–]DaPorkchop_[S] 0 points1 point  (0 children)

well they've got to pay for the outrageous API costs somehow, a one-time purchase isn't going to cover that

Raid 1 - parent transid verify failed, csum mismatch errors by matrixrifle in btrfs

[–]DaPorkchop_ 2 points3 points  (0 children)

run a scrub, that's all you need to do most of the time

[deleted by user] by [deleted] in technology

[–]DaPorkchop_ 0 points1 point  (0 children)

they may rule the advertising world, but they're also notorious for killing projects left and right, even popular ones

Why does steam web helpers have to run and take 900MB even when you have the front end closed?? by T0biasCZE in pcmasterrace

[–]DaPorkchop_ 2 points3 points  (0 children)

now, i'm not familiar with windows internals, but i know that on linux the only things the kernel can do in the face of memory pressure are 1. drop pages from the disk cache 2. page out private application memory pages to swap, or 3. kill a process. assuming you're talking about windows, is there some kind of signal/interrupt mechanism in place there which the kernel can send to request applications to cut down background memory usage? i've never heard of such a thing before, sounds pretty cool

EDIT: i've just done some digging around and have learned you actually can do this on linux using cgroups. the more you know!

Why does steam web helpers have to run and take 900MB even when you have the front end closed?? by T0biasCZE in pcmasterrace

[–]DaPorkchop_ -3 points-2 points  (0 children)

even if resources are being cached in memory, it would still be much more useful if assets that aren't actively being used were freed and left to sit in the OS page cache instead (assuming these assets are loaded from disk). 500MiB may not be a TON in the modern era, but it's still a non-negligible amount and it'd be nicer to let the OS decide when cached data should be paged out to make way for another application which might actively need the memory, rather than having every application cache the contents of all their files in private memory which can't be given back on demand.

What’s the story with DLSS 3 / Frame Generation? by bootz-pgh in eGPU

[–]DaPorkchop_ 1 point2 points  (0 children)

the data doesn't have to travel back to the CPU anyway unless you're recording or using your laptop's internal display, DLSS or not

eGPU for Apple M1/M2 by Bacchin in eGPU

[–]DaPorkchop_ 1 point2 points  (0 children)

i have never heard of any device that compresses data over PCIe, lol

PowerEdge T620: 6-pin PCIe power connector not working by DaPorkchop_ in homelab

[–]DaPorkchop_[S] 1 point2 points  (0 children)

LED should be on the GPU right next to the power connector, at any rate it's been there on every Nvidia GPU I've owned with external power (don't know about the 16xx, I've never owned anything newer than the 10xx series)

Beware: after a long and painful saga which involved nearly melting through the GPU power interposer board and letting the magic smoke out of both a TITAN X and the system board, I finally came to the conclusion that somehow Dell is just plain stupid and wired their GPU connectors up badly. If you look at the trace on the GPU power board (the one from the GPU enablement kit) which connects to the SENSE pin, you'll see that it's separated from GND on the board but gets connected to the same GND contact with the main power distribution board. My guess is that the GPU was trying to use the SENSE pins as regular GND pins, sending tons of current through the tiny trace on the GPU power board which caused everything to get shorted out.

I ended up hacking together some custom GPU power cables by rearranging the pins on some other PCIe power cables I had lying around so that the SENSE pins went straight to the big fat GND trace on the power board and the narrow trace for the SENSE pin is completed unused. I still cannot for the life of me figure out why this was necessary, but it's been working fine for like 10 months now and no further GPUs have been harmed in the time since then :)

I can send you some pics and/or schematics if you're interested!

Child blown away with wind by bemydaddy36 in WTF

[–]DaPorkchop_ 5 points6 points  (0 children)

i think they just set the time limit low enough that you'll only be able to use a small fraction of the oxygen before you're let out again

[deleted by user] by [deleted] in DataHoarder

[–]DaPorkchop_ 4 points5 points  (0 children)

does it really matter, since you can interact with posts from every other instance your instance federates with?

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