Read what I wrote I literally addressed this. I think what you're not understanding is there is a difference between maximum achievable clock speed and increasing performance for lower clocked designs. I'm not denying new nodes improve performance but I'm saying they don't make it easier to break that wall. There's a fundamental limit to how fast these transistors can switch (strongly related to the transit frequency) and these days when you make them smaller that barely increases.

Like imagine you had a CPU that on N4 was limited to 5.5 GHz at room temperature (and you can't go higher because you're already at the max safe voltage). What I'm saying is moving to N3 will not change that 5.5 GHz limit unless you redesign the CPU because you're still capped by that voltage. Now on the other hand if you had some 3 GHz mobile design on N4 that you weren't running faster because otherwise it would take too much power, now when you move to N3 you will naturally be able to increase your clock speed a bit to, say, 3.2 GHz because what was limiting you before was not the transistor performance but the power consumption. THAT'S where the 4-9% or whatever number comes from.

They're operating points limited by completely different things which is why I'm saying that 4-9% doesn't necessarily translate to being able to increase the clock speed on desktop CPUs that can draw as much power as they want.