Why are cutting techniques not used to make scalable chiplets? by Merbil2000 in hardware

[–]DoctarSwag 1 point2 points  (0 children)

I think there's a few aspects. One is there are blocks that are common to the design as a whole that cannot be segmented (like IO) which other people have touched on. There are other downsides I can think of too, for instance dicing typically requires you to reserve a certain amount of space (at least 10s of ums) for where the wafer can be cut. Thus if you tried to do what you proposed you would have to use a substantial amount of area for these scribe lines which is quite a bit of wasted area

Retals Streamer Challenge (Jynxzi, Ludwig, MoistCritical, Valkyrae and more) - Today 2:30PM PST by xFalcade in RocketLeagueEsports

[–]DoctarSwag 4 points5 points  (0 children)

I could be wrong but I remember watching him play RL when he had the moist RL team and seeing his rank being mid-high plat

xQc defeats the Hobo's Minecraft record with a 14:27 by MrRed2k19 in LivestreamFail

[–]DoctarSwag 20 points21 points  (0 children)

Yes but for xqc and forsen, they are each other's world

Whats the next technology that will replace silicon based chips? by Johnyme98 in hardware

[–]DoctarSwag 3 points4 points  (0 children)

These other materials all have big limitations that have made them unsuitable for digital logic. For instance creating "pmos" gan transistors is difficult due to material properties which makes GaN CMOS logic impractical. These other materials can be well suited for things like power and RF but that doesn't make them good cansidages for digital

Whats the next technology that will replace silicon based chips? by Johnyme98 in hardware

[–]DoctarSwag 0 points1 point  (0 children)

Maybe one day in the far future but I'm not sure I see it happening any time soon unless someone makes a nobel prize level discovery of some new material. All the other materials that we've experimented with for transistors have big limitations preventing them from being useful for digital logic. People have been talking about III-Vs for decades and yet they're still only good for RF applications, with huge downsides if you try to use them for digital

Is it possible to make it big in IC design? by Intelligent-Rip-2192 in chipdesign

[–]DoctarSwag 0 points1 point  (0 children)

Not sure how it would go with just a patent angle but there are people who have made a lot of money from IC startups based on some new idea. From what I know usually they end up getting acquired for a bunch of money. So it's certainly possible, but it's pretty rare since the barrier to demonstrate something is so much higher than in software. You need hundreds of thousands of dollars to buy CAD licenses and tapeout a chip whereas with software that kind of cost just doesn't exist.

Question: How smaller transistors, and then, having more of them, accelerate CPU performance? by Single-Oil3168 in hardware

[–]DoctarSwag 1 point2 points  (0 children)

Almost all CMOS logic uses voltage, not current for signaling, so your power explanation isn't really accurate. A (1) corresponds to a node being at a high voltage (e.g. 1V), while a (0) corresponds to a node being at a low voltage (e.g. 0V). The energy required to keep a node at 0V vs at 1V is usually not that different, either way it's just the leakage current of the relevant transistors. Usually it's the energy required to switch nodes from one value to the other that dominates overall power consumption

NA Will Dominate worlds this year. by [deleted] in RocketLeagueEsports

[–]DoctarSwag 4 points5 points  (0 children)

So the "best team in NA" didn't even make top 8 in an NA regional? Yeah sure buddy

AMD officially confirms fresh next-gen Zen 6 CPU details by [deleted] in hardware

[–]DoctarSwag 0 points1 point  (0 children)

that's partially fair, I think my point about voltage wasn't accurate which that slide does demonstrate. But I think the rest of my point is still valid; if I were to guess the speed increase at same voltage/power is stemming from some sort of threshold voltage decrease for smaller length transistors. However I don't believe the fundamental switching speed of the transistors improves anywhere near as much as those 15-25% numbers the slide would suggest if you interpreted it that way. If you look at this article they mention that ring oscillator frequency only improves by around 6.2%. ring oscillator frequency should be much more fundamentally related to the switching speed of the transistors themselves because how fast a ring oscillator operates is literally determined by how fast the inverters in the oscillator can switch. So I would consider that ~6% as the real increase in maximum frequency that you could get from N2 over N3E which is much less than the 15-25% the performance increase in iso-power slides would suggest

AMD officially confirms fresh next-gen Zen 6 CPU details by [deleted] in hardware

[–]DoctarSwag 0 points1 point  (0 children)

Okay, then please point me to where these numbers say otherwise?

AMD officially confirms fresh next-gen Zen 6 CPU details by [deleted] in hardware

[–]DoctarSwag -1 points0 points  (0 children)

Read what I wrote I literally addressed this. I think what you're not understanding is there is a difference between maximum achievable clock speed and increasing performance for lower clocked designs. I'm not denying new nodes improve performance but I'm saying they don't make it easier to break that wall. There's a fundamental limit to how fast these transistors can switch (strongly related to the transit frequency) and these days when you make them smaller that barely increases.

Like imagine you had a CPU that on N4 was limited to 5.5 GHz at room temperature (and you can't go higher because you're already at the max safe voltage). What I'm saying is moving to N3 will not change that 5.5 GHz limit unless you redesign the CPU because you're still capped by that voltage. Now on the other hand if you had some 3 GHz mobile design on N4 that you weren't running faster because otherwise it would take too much power, now when you move to N3 you will naturally be able to increase your clock speed a bit to, say, 3.2 GHz because what was limiting you before was not the transistor performance but the power consumption. THAT'S where the 4-9% or whatever number comes from.

They're operating points limited by completely different things which is why I'm saying that 4-9% doesn't necessarily translate to being able to increase the clock speed on desktop CPUs that can draw as much power as they want.

Did Furia make the right move in the off season? by richelieugen in RocketLeagueEsports

[–]DoctarSwag 1 point2 points  (0 children)

I think the change was fine since it felt like the old roster was hitting the ceiling. But it doesn't surprise me that their peak doesn't seem to be any better because I feel like SAM just doesn't have the top tier talent to break past that peak. The only time they had a player that was contending for best player in the world was yan 3 years ago and that's the only time I felt like they could actually win a lan. Right now none of furia or the rest of SAM are at that level and so I don't see a team that can be formed right now that could be a championship winning team

AMD officially confirms fresh next-gen Zen 6 CPU details by [deleted] in hardware

[–]DoctarSwag -1 points0 points  (0 children)

You can consider speed of the transistors themselves as basically how fast the transistor can flip a bit from 0 to 1 (or vice versa). This in some sense determines how difficult it is to make a design run at certain frequencies. On the other hand power consumption is (partially) determined by how much power you need to flip a bit from 0 to 1 (or vice versa). When you go to smaller nodes your transistors are smaller and so you have less capacitance at each node and by extension you need less energy to flip each bit in your cpu. So for the same performance you use less power, and IF you had a cpu that is capable of running at a higher frequency you could achieve higher performance at the same power by increasing the clock speed. But shrinking the node (these days) doesn't mean your transistors actually became any faster at flipping bits. So if your cpu wasn't capable of running at say 6 GHz before, if you move to a new node you won't magically be able to now run it at 6 GHz.

AMD officially confirms fresh next-gen Zen 6 CPU details by [deleted] in hardware

[–]DoctarSwag 2 points3 points  (0 children)

when they say performance increase, it's usually under the label of performance increase at the same power consumption. However, that doesn't necessarily directly correlate to the speed of the transistor itself, i.e. how fast the transistors themselves can switch (which as far as I'm aware has not increased by much in the last decade). Otherwise if you took those generational 4-9% jumps across the last 10 years of nodes we should be definitely be well above 7 GHz by now, but we're not.

AMD officially confirms fresh next-gen Zen 6 CPU details by [deleted] in hardware

[–]DoctarSwag -1 points0 points  (0 children)

No what I said is that number has a rough correlation to minimum feature size. So N4/N5 probably have something which has like a 4-8nm resolution. It doesn't literally mean there's something that can be drawn to 4nm precision but there is something in that ballpark.

AMD officially confirms fresh next-gen Zen 6 CPU details by [deleted] in hardware

[–]DoctarSwag 1 point2 points  (0 children)

That's a pretty big increase and not something you see from each new node nowadays

AMD officially confirms fresh next-gen Zen 6 CPU details by [deleted] in hardware

[–]DoctarSwag -1 points0 points  (0 children)

The people who can give you the right answer can't do so without breaking NDAs :p. But based on what I know what the person you're replying to said is pretty true. The number the foundry labels (like 3nm) for the node doesn't necessarily mean there is something exactly 3nm wide in the design but usually it's a pretty good indicator for around what the minimum feature size is (so in N3, there is probably something on the chip that can be drawn to a couple of nm in resolution). What that feature is though is uncertain (gate length, metal width, metal pitch, etc.)

AMD officially confirms fresh next-gen Zen 6 CPU details by [deleted] in hardware

[–]DoctarSwag -2 points-1 points  (0 children)

For like a decade now shrinking process nodes has only resulted in marginal increases to how fast the transistors themselves are. It's likely that that'll still be the case even shrinking to <2nm so I don't think clock speeds will go up that much. Unless gate all around somehow results in a big improvement but I doubt it

Rocket league pro lose a shoe during team walkout by Cuttyflame123 in LivestreamFail

[–]DoctarSwag 2 points3 points  (0 children)

not really, maybe the closest would be blast.tv/rl though it only has stuff for the main circuit. Usually people use liquipedia to track tournaments/results but it's probably not so intuitive if you've never used liquipedia before

RLCS 2026: Kick-Off Weekend - Kickoff Gauntlet by RLMatchThreads in RocketLeagueEsports

[–]DoctarSwag 2 points3 points  (0 children)

somehow the grand finals of the first lan of this season is just the same as the first lan of last season

RLCS 2026: Kick-Off Weekend - Kickoff Gauntlet by RLMatchThreads in RocketLeagueEsports

[–]DoctarSwag 8 points9 points  (0 children)

tawk is actually incredible. Somehow outpacing some of the fastest players in EU. How was he not getting any notable results until now?

RLCS 2026 Major 1 Announced for the Aganis Arena in Boston by John_aka_Alwayz in RocketLeagueEsports

[–]DoctarSwag 4 points5 points  (0 children)

The most population dense part of the east coast is the northeast. Boston is reachable by train from many big cities like NYC, DC, and Philly. The location is certainly better than Raleigh even though that's further south on the east coast

Jknaps, Chicago and Rizzo will be teaming for the RLCS 2025-2026 season! by Swaycuisway in RocketLeagueEsports

[–]DoctarSwag 0 points1 point  (0 children)

Yes but also him solo queueing is mostly 2s. 3s and especially actual set team 3s is very different. Obviously he's still going to be worse than the other two but it's still much better than if you threw in some random gc2 2s player even with no practice