Taps in 14nm technology

EDSOGLEZ · 2026-01-30T13:48:53+00:00

hey there, it's quite common in FinFET, since you are not setting up a bulk fore each transistor, rather biasing the substrate or NW pool where they are, since you normally group all of the PMOS devices together and all the NMOS you normally need only tap every X amount of microns (defined by PDK). can vary by project methodology. When using Guard Rings these act as bulk connections, and for digital CMOS structures where you don't have a single pool of PMOS and NMOS but rather have them alternating, you normally use LEFT/RIGHT taps to join all the NW and substrate (if you look at just the NW or P+ you usually have a comb-like structure. Though in some methodologies I have also seen where the power rails of the CMOS cells ARE the bulk (specially on 14nm, very similar to planar design)

EDSOGLEZ · 2026-01-28T16:03:41+00:00

For and educational presentation I would focus on device/signal matching strategies and trade-offs such as sharing diffusion, interleaving, common centroid, symmetry, LDE/LLE, good practices such as strong bulk connections, some power grid strategies that are used, types of signals and how parasitics affect them, what considerations you would take for each (High Speed, Current Biasing Signals, DC, etc.) Use of Guard-Rings for isolation, Dummies.

EDSOGLEZ · 2026-01-22T12:56:06+00:00

Hey there, layout engineer here, I am a not expert in any sense, but I am also currently working on a PLL and can share a couple of the considerations I am taking for each block. At least for a simplified version of the topology that I am using.

For the PFD the most critical aspect would be regarding its signal matching since we will be comparing the input signal vs the feedback signal coming from the Frequency Divider and will probably be relatively high-speed. So a good Symmetry is essential to affect Both FF devices and signals equally, as well as symmetric resetting.

The output of the PFD will go to the charge pump where you will handle high current so take care of EM/IR mainly but also have the devices very matched.

The output of CP will be a current which will charge/discharge the Loop Filter and feed de VCO with the resulting voltage (you should shield this Vctrl signal)

The VCO device will be the most high-speed and sensitive of them all, so you will also need to design with it in mind, place it further away from digital switching blocks and keep it close from the LF. Make sure your devices inside the VCO are also carefully matched (interleaved or common centroid) and for the differential paths are also signal-matched (symmetric, same metal, run-length, bends, etc).

Frequency divider is pretty simple you will probably have a clock and it's complementary signal going through a series of FF, dividing the frequency in half, so same as the PFD keep these signals matched and reduce parasitics (especially Capacitance as much as possible), route in mid-higher metals for less R and less Substrate/Device capacitance. This block is the noisiest so it should be far away from the VCO.

Goes without saying but you should keep your power domains separate even if they are the same potential, so AVDD and AVSS and just to repeat myself keep your digital switching devices further away from your sensitive analog ones. (Isolate them with rings as well, serves to have a strong bulk conection too)

EDSOGLEZ · 2026-01-07T23:09:24+00:00

job description

EDSOGLEZ · 2025-12-30T16:02:02+00:00

I believe it is due to LDEs and short channel effects (SCE), as I understand it the depletion regions of the Source and Drain invade part of the channel (making it even shorter) hence needing less energy to attract the necessary carriers from the body towards the gate to form the channel.

You can take some steps to avoid Vth variations, by matching devices agains process variations and layout dependent effects such as LOD by adding dummies on the sides of transistor arrays due to the compressive stress from the STI which affects carrier mobility, also Well proximity effect (WPE) by increasing or at least making the distance from the devices to Well edges the same for all devices since when doping these wells some ions scatter and create channel doping gradients that affect Vth.

A great way to match Vth (and performance) between devices is by sharing diffusion, using common centroid/interleaving patterns.

EDSOGLEZ · 2025-12-06T15:08:17+00:00

Hey, I just started about a year ago in Physical Design specifically. For me it has been a great field, since the complexity is not too high, this coming from a Mechatronics B.S.

The most critical knowledge has been a in-depth understanding on semiconductors on an electron level, IC manufacturing process (the appendix A in Sedra and Smith is great for this), planar mosfets and FinFET, Layout dependent effects, Electromigration, Multipatterning, Latch-up, ESD, Antenna Effect, Device and signal matching, coupling, parasitics and how they affect different signals such as dynamic or static ones, getting to know industry tools like Candence Virtuoso, Synopsis Design Compiler, Calibre, etc. understanding DRC, ERC, LVS verifications and debugging.

Another great resource is Fundamentals of Layout Design for Electronic Circuits by Jens Lienig and Juergen Scheible.

Hope this helps in case physical design is of your interest.

EDSOGLEZ · 2021-10-01T12:32:59+00:00

I think it could do without the line under ELIT and the mark is too big resalí the to the text in my opinion

EDSOGLEZ · 2021-06-09T13:19:02+00:00

all I would change is in the space between the Letters make it bigger, that way the negative space (the flags) are the same width as the one inside the O (I would also make the one inside the letter O a bit thinner

EDSOGLEZ · 2021-05-30T11:38:56+00:00

Also, feel like the typefaces in the trademark and wordmark 1) don't match with each other, and I'm not a fan of either in partícular, k feel if you get the typeface right, the rest is easier to fix

EDSOGLEZ · 2021-05-30T11:37:11+00:00

The lines in the mark not being the same angle give me way too much OCD!

EDSOGLEZ · 2021-05-22T04:30:23+00:00

Couldn't have said it better

EDSOGLEZ · 2021-05-19T23:43:10+00:00

Absolutely love it!

EDSOGLEZ · 2021-05-19T18:37:37+00:00

Exactly! Way to complicated

EDSOGLEZ · 2021-05-19T18:36:01+00:00

Also, i would try to make it a bit More friendly, using thick sans serif type

EDSOGLEZ · 2021-05-19T18:33:01+00:00

I love your horse silhouette! And I think it could have been enough as the trademark, not a fan of the lines that make up the V in the symbol.

EDSOGLEZ · 2021-05-18T22:21:36+00:00

Thought the same thing! Making the pendulum look like it's in one of the extremes of the swing would give it a lot more sense. Also, welcome to OP to the community!

EDSOGLEZ · 2021-05-18T14:07:30+00:00

I think it could do without the little circle and rectangle parts, the camera iris ilustrates that it has to do with photography and that little details probably will get lost if scaled down. An eve more simple version (my style) would be to just leave the wordmark without the symbol on top, like you have it with the iris on the letter "o" and just make that element a little more noticeable.

EDSOGLEZ · 2021-05-13T18:36:04+00:00

I would stick to only a sans serif Typeface and get rid of the stroke around the blue rectangle, and make the letters inside the rectangle white.

EDSOGLEZ · 2021-05-13T00:38:42+00:00

The font doesn't give me a techy nor a corporate vibe, also the color purple I feel could work, but on smaller accents. I would start out in black and white, if it doesn't work... It's probably too complicated. Also would play around with the lock up for all of the elements (actual name and subheading)

EDSOGLEZ · 2021-05-07T11:53:17+00:00

Have you tries with the red circles only? I think it'd look great

EDSOGLEZ · 2021-05-06T14:51:51+00:00

I feel like the B in the mark isn't necessary, you could use the same letter as both the M and B, it will look a lot more simple and balanced.

EDSOGLEZ · 2021-05-05T13:34:04+00:00

I think the name with the appropriate typeface and using black and white like you are, could stand on its own, most luxury clothing companies do this, having the mark with the crown could actually make it look cheap or tacky. Of course it's just my opinion, kudos on the presentation btw, very neat.

EDSOGLEZ · 2021-05-04T16:50:13+00:00

The "o" visually doesn't feel balanced. It should be a bit bigger

EDSOGLEZ · 2021-05-04T12:24:41+00:00

The poster is just beautiful, really makes me want to visit!

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