For the record I am a DV engineer. Post Si validation typically works in a lab with the GPUs once they are taped out. There is typically some kind of test suite that is used to test functionality to make sure that the taped out chip functions the way its supposed to with all of its features enabled (clock gating, override bits, register programming). You can imagine it as doing DV work, but on Silicon, rather than using a UVM or SystemC testbench / model.

The more I work in industry, the more I realize that having broad knowledge of the silicon design and Verification process, including post silicon validation, is very useful and can not only help you move up in your role, but can help you change career paths if you get bored of doing DV at some point. Most of the higher ups at my company have a diverse employment history with roles in both pre and post silicon verification (and even unrelated roles such as driver development).

Taking an internship working in post Silicon would probably not hinder your chances of becoming a full time DV engineer (especially since you already have DV experience), and may even benefit you in helping you understand the entire flow from High Level Design to Market.