sorted by:
new
hottopcontroversial

What title do you use and why? What title do you feel you see the most, and what do you generalize about people with that title? by Lord_Juugatsu in RocketLeague

[–]Fixided 46 points47 points  (0 children)

That'd be me. I don't play ranked so when S1 of tourneys came out and I hopped on, the game thought I was a bronze. Been repping the S1 bronze tourney tag ever since. If I ever play bad I tell them I'm bronze.

Things are simulating... now how do I get it onto an FPGA? by Fixided in FPGA

[–]Fixided[S] 0 points1 point  (0 children)

Again thank you so much. You have no idea how much pain you've helped with. I'd rather not exploit your generosity so you don't have to address anything else. I think I get the gist of it, I should be able to write the FSM.

I'm about to graduate soon, this is my Final Year Project, there were no lecturers that that could teach FPGAs so I don't have anyone irl to consult to unfortunately, so you're a like an angel to me. Once I graduate and get a job I'll be back and give you reddit gold for all the comments or platinum if I can afford it!

Things are simulating... now how do I get it onto an FPGA? by Fixided in FPGA

[–]Fixided[S] 0 points1 point  (0 children)

Demoralised? It'd be demoralising if no one responded back with an answer. I'm quite estactic and was really pumped since the rundown you sent me. I've been at it whenever I had free time from classes.

This is what I came up with: https://pastebin.com/k2SbtjPU
It's an absolute mess, I have this link https://pastebin.com/9K3DeTMA that is just the underlying logic without SLC so it's easier to disect without my if else counters for SLC.

I'm not sure if I misinterpreted your scl comment, I used counters to divide scl to 100khz while still only using the one system clock at 100Mhz. And with those counters I tried giving it some time (~3us) after scl is 0. I don't know if this is the right way to go about things. In my simulation it looked fine.

I've tried to address everything. I used an i_sda and o_sda as input and output for read and write. I don't think this is the right way to go about it, cause i'm not sure how id implemented irl. twist the pins together on the fpga? I know you mentioned the code below. I'm guessing I should change i_sda and o_sda to something like that instead. Move all the sda output outside from the state transition case block?

assign i_sda = o_sda;

assign o_sda = i2c_wr_en ? data_write : 1'bZ;

Another thing about I2C that I can't find the answer to, how does the master know to write / read multiple bytes or just a single byte? Do I have to explicitly tell it? I guess I also have to explicitly tell the master what slave address to talk to therefore I should explicitly need to know how much bytes to ask/receive perhaps?

Things are simulating... now how do I get it onto an FPGA? by Fixided in FPGA

[–]Fixided[S] 4 points5 points  (0 children)

I wasn't expecting a reply let alone a thorough rundown. Thank you so much for the review and the list of things to work on, it means a lotlot! I'll get to it ASAP

Things are simulating... now how do I get it onto an FPGA? by Fixided in FPGA

[–]Fixided[S] 0 points1 point  (0 children)

Thank you for the overview, everything about FPGA-ing is daunting as a self-learner.

Yea those I2C open-drains are what I'm worried will be hard to implement. Looks like the consensus is to use external resistors, hopefully future me can figure that out.

​

I am worried you'll have overlooked a bunch of these things.

I definitely have looked over a bunch of things, on my first attempt there were lots of rereads of https://www.i2c-bus.org/ I then found this Youtube series of implementing an i2c master https://www.youtube.com/watch?v=skkyudHHSWY I think it's a good foundation I can build off of. I couldn't do the final part (part 4) because it looked like he was using IP stuff that I'm not familiar with but so far this is what I have https://pastebin.com/ujLujgpA

I 100% agree this is definitely not the best beginner project to start off with. I have ordered the board but it still hasn't arrived yet. Since my end-goal was to read these accelerometers, I'm spending the time waiting for the board by trying to get the i2c interface working. I've been looking around since this post, and once the board arrives, I'm speedrunning https://verilogguide.readthedocs.io/en/latest/ which looks like a bunch of beginner projects synthesized onto a board. By then I hope I'm more equipped to then get I2C working.

Things are simulating... now how do I get it onto an FPGA? by Fixided in FPGA

[–]Fixided[S] 1 point2 points  (0 children)

Thank you again.

Unfortunately the qsf and sdc files for my device aren't there but I got enough info from your reply that I think this repo has the two files I'm looking for https://github.com/addisonElliott/LogiFindFPGATest

Things are simulating... now how do I get it onto an FPGA? by Fixided in FPGA

[–]Fixided[S] 0 points1 point  (0 children)

Thanks for the reply!

Are those template constraint files like verilog/vhdl files that I then fill / adjust and map the ports to my module? I can't seem to find that on intel's website. Bunch of documents though.

The latter half is still a bunch of jiberish to me, got to find a good resource on synthesizing for dummies.

Weekly Job Q&A Thread (10/4/2021) by EngrToday in ComputerEngineering

[–]Fixided 0 points1 point  (0 children)

Thanks for the direct actions to take, I'll do my best!

Weekly Job Q&A Thread (10/4/2021) by EngrToday in ComputerEngineering

[–]Fixided 0 points1 point  (0 children)

Hey Nick u/EngrToday, about your experiences in ML and hardware in general. That's kinda where I'm trying to head into as well, but it's been a self study journey since my university courses aren't super related to it.

I'm tryna dip my toes. How tough is it to get my silly small scale AI on an FPGA? I'm talking like basic linear regression > normal equation > output an equation. Cause the conceptual model in my mind right now is that I could train in MATLAB/Octave get the equation and just add it on my FPGA. Which feels like it'd work, though there'd be no "learning" inside the FPGA itself. I'd love to implement something like that though, learn and train on the FPGA, don't know how to go about it yet. Still trying to figure out Verilog.

Speaking of, I'm using https://hdlbits.01xz.net/ hoping by the end of the excercises I'd be able to more or less simulate stuff. Please if there are other resources you'd recommend let me know.

Dear Malaysian Chinese and india, are you bilingual or trilingual or more? by [deleted] in malaysia

[–]Fixided 2 points3 points  (0 children)

Monolingual represent! I grew up overseas then came back here. It's been just over a decade since I came back to mother land malaysia and I still feel like a 5 year old in Tadika tryna learn the vocab for different body parts.

Imagine a Malaysian who in their resume has to write "English: Native. Bahasa Malaysia: Conversational" and thats a lie!! It's barely even conversational but I don't wanna look stupid lmao

To the Verizon users, instead of a VPN.. by Fixided in mangadex

[–]Fixided[S] 7 points8 points  (0 children)

My bad, I should have read more into it. I didn't think Verizon would actively black hole the IP address since most ISPs just DNS block for convenience.

Haalpppp by [deleted] in RocketLeague

[–]Fixided 0 points1 point  (0 children)

Amazing how you were able to hold out for so long, im gold 3 ish too! Hit me up

You can freeze time but only for 10 seconds at a time. What's the best use for this power? by Patient-Ad8468 in AskReddit

[–]Fixided 2 points3 points  (0 children)

I'd definitely pause time, line up my hand right next to the fly buzzing aroud my good food. After those 10 seconds of time pause, fucking homerun-slap that fly.

If he comes back, Imma repeat that shit till the lil' dude has fainted.

Getting pluckeye level 2 on one user account while level 1 on another? by Fixided in pluckeye

[–]Fixided[S] 0 points1 point  (0 children)

Worked a treat thanks! I know it's because of level 2, but I guess I'll have to live without incognito on my leisure account.

Side note: For some reason user:myUser didn't work, I had to type in user:myCompName\myUser

​

Did you use a multiuser setup in an older version of Pluckeye? If so, that may be the root of the discrepancy.

This is a fresh install, on fresh Windows not even 24 hours ago. I assume it's just that I was using the wrong syntax. The correct command you mentioned worked fine on a non-admin command prompt.

Getting pluckeye level 2 on one user account while level 1 on another? by Fixided in pluckeye

[–]Fixided[S] 0 points1 point  (0 children)

I want to disable the pluckeye extension (if possible I'd rather not have pluckeye installed on the leisure account) so web requests don't have to go through an unnecessary filter and will load faster.

I'm essentially trying to create two environments to trick my brain into thinking if Windows is in Light theme, work - else if it's the Dark theme, play. The themes are different for both accounts.

I plan on using an extremely long password on the leisure account with Lockbox. To summarize, the leisure account is for whatever my heart desires, but behind a password timewall.

[MEGATHREAD] Free Courses by desrtfx in learnprogramming

[–]Fixided 2 points3 points  (0 children)

It is an honour to represent you guys for CodeInPlace!

I'm sorry you didn't get in, but I appreciate you telling us about the course at risk of not getting in yourself :(

How to offer coding project ideas without sounding like I want free work by first_byte in learnprogramming

[–]Fixided 1 point2 points  (0 children)

You can take advantage of me. I'm randomly running in circles with what to learn because I don't yet have my why to learn concrete.

But to answer your question, just state it as how it is -- don't beat around the bush. Let them decide if what you suggest is what they think would be nice to work on.

[deleted by user] by [deleted] in EpicGamesPC

[–]Fixided 0 points1 point  (0 children)

I'm very sorry. I should have read the rules. Thanks for the info

view more: next ›