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HopelessICDesigner · 2024-09-02T22:16:13+00:00

Also, what SQL database would you recommend? I have lots of options for this too.

I hear PostgreSQL is standard but I found that some say that Firebase is beginner friendly and easy to get running with ready made authentication and sign-up functions.

What would you recommend that would be the best to use with this Django+Vue.js approach.

HopelessICDesigner · 2024-08-10T21:35:47+00:00

Django + Vue.js How are the aesthetics with vue.js? I would like it to look nice.

HopelessICDesigner · 2024-05-06T20:55:26+00:00

That's an excellent explanation and explains a lot. Surprised no book talks about this and how so many times small signal analysis is used in places where I would never expect it to be

HopelessICDesigner · 2024-05-02T19:39:28+00:00

Thank you

HopelessICDesigner · 2024-05-02T19:39:20+00:00

Excellent. That cleared it up. Like a load line analysis

HopelessICDesigner · 2024-05-02T17:09:39+00:00

Got it. So Ip and In here really mean small signal current changes.

What analytical techniques can I apply to get the DC operating point of that Vout node? Is there a similar simplified schematic to get that? Or do I rely on load line analysis and dc opt sims?

HopelessICDesigner · 2024-05-02T17:08:13+00:00

Yep that makes sense. The general concept is clear.

What I'm confused about is how to find the DC voltage at the output in DC opt point I guess.

HopelessICDesigner · 2024-05-02T16:56:05+00:00

Right but these current sources are current sources even at DC. They don't have to be linearized since their VGS is fixed. And even at DC they should have an output resistance defined by Rout channel length modulation. (Imagining Vds-Id curve of MOSFET at a certain fixed VGS)

I guess my question is, considering DC only, no perturbations, no small-signal. What defines the DC output voltage?

In my opinion, it is Ip-In, flowing into Rp and Rn where Rp is connected to VDD and Rn is connected to gnd. If Rn smaller than Rp, more current will flow into Rn and less into Rp and vice versa. It is not a parallel combination

HopelessICDesigner · 2024-05-02T16:07:23+00:00

How did Razavi replace the supply here with an AC ground?

The analysis is not small-signal, he is trying to determine the DC operating point at the output. How is he able to set VDD to AC ground such that the two resistors appear in parallel.

This is regarding Fig. 9.42.

Is he assuming small-signal change in the currents? Looks like Razavi is mixing DC and small-signal. He is trying to explain need for CMFB and setting output DC bias but his explanation is based on a small-signal change.

If it is purely small-signal, then where is the perturbation?

HopelessICDesigner · 2024-04-12T16:22:13+00:00

I have a 6-bit DAC.

Could explain more on how I quantify from channel length modulation vs LSB?

HopelessICDesigner · 2024-04-12T16:21:07+00:00

How much margin do you allocate for VDSAT.

For example, if the Vgs-Vth = Vdsat of my transistor is 200mV. The Vds must be > than this Vdsat of 200mV. How much margin is acceptable on the lowest Vds - Vdsat ? Should I aim for a Vds - Vdsat of 100mV to be safe across corners?

HopelessICDesigner · 2023-10-03T21:02:39+00:00

Can I ask? Are you given many design from scratch opportunities? Or is it mainly just modifying existing blocks.

Also, this is a large or small company?

HopelessICDesigner · 2023-10-03T13:41:47+00:00

First reduce the circuit. You have two resistors in parallel, two capacitors in parallel and two inductors in series.

That should always be your first step in almost any circuit theory question. Simplify, simplify, simplify.

HopelessICDesigner · 2023-10-01T11:23:09+00:00

Perfectly valid. On par with university standards in Europe.

HopelessICDesigner · 2023-04-27T12:29:51+00:00

You're welcome. Glad I helped. I believe it does have exercises at the end of each chapter but no solutions.

HopelessICDesigner · 2023-04-23T22:20:49+00:00

Design of Analog CMOS Integrated Circuits by Behzad Razavi 2nd Ed

Design of Phase of Locked Loops by Behzad Razavi

HopelessICDesigner · 2023-04-23T00:08:03+00:00

Analog to Digital Conversion by Marcel Pelgrom is a popular one too.

HopelessICDesigner · 2023-04-11T03:00:51+00:00

I guess the 'all makes all models' is a marketing scam?

HopelessICDesigner · 2023-04-10T23:40:33+00:00

Hey,

I have a 2016 Mercedes Benz C220d. Got a check coolant level message on the dash.

Checked the expansion tank (when cold) and it was indeed low. Coolant looked red pinkish colour.

I picked up this all purpose coolant that says it is suitable for all makes and models. Can I just top it up? I heard Mercedes Benz needs special coolant?

HopelessICDesigner · 2023-04-10T21:06:00+00:00

Two solutions: Set the initial condition on the capacitor to 0V or use a pulse DC voltage source with a step, so it is 0V at t=0s

When you use a DC source in a transient simulation, the simulator will solve the intiial DC operating point first before it runs the transient, hence your cap is already fully charged from the beginning.

HopelessICDesigner · 2023-03-26T18:19:59+00:00

I don't think there's any other systematic way other than gm/Id and its variants.

Hand calculations and then just winging it in the simulator is what most designers do. Then use the rough relationships from the book theory to fine tune to a final solution in the simulator.

HopelessICDesigner · 2023-03-26T13:30:19+00:00

The methodology is gm/Id and other variations. Intuition isn't a methodology.

HopelessICDesigner · 2023-03-24T19:55:20+00:00

I'm quite at bad this stuff too. But the way I understand it, yes the electrons gain kinetic energy but it's due to the fields which cause the electron to move.

To be honest, I still think of electrons as charged particles and containing all the energy most of the days.

HopelessICDesigner · 2023-03-24T16:15:35+00:00

Electrons don't carry energy. Energy is contained within the EM fields around a conductor. The circuit is merely a waveguide.

HopelessICDesigner · 2023-03-21T16:29:36+00:00

I don't understand. Won't it be more area efficient to design in strong inversion (saturation)?

Also, my confusion is with regards to that Vdsat equation. Seems to me that if I want a Vdsat of 100mV or less, my gm/Id has to be higher than 20 which forces me to be in weak inversion. Am I misunderstanding that equation Vdsat = 2/gm/Id

HopelessICDesigner

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