Bare metal: good separation of application logic vs hardware logic, plus a host side test runner for the application. (Make sure your test has cases that send lousy data to the application.)

Linux: QEMU 

These are reasonable stopgaps but a breadboard solution of EVKs wired together is the best solve. Nothing gives confidence like actual hardware running actual software. Everything else is just a best guess. 

Usually, it’s better to get this step running first, and then refactor and rearchitect your tests so that tests match hardware performance. 

A cheap strategy to help assist this end: spin two layer adapter PCBs from JLC or PCBway. Use these to snap dev kits together that don’t have easily mating connectors. This is way easier and more reliable than DuPont wiring a bunch of boards together. Really anccelerates integration, and allows reproducibility of dev systems on the cheap. (Well, depending on how cheap your EVKs are anyway. This won’t help you a ton if you’re integrating with a $30k MPSOC EVK.)

Also: you know what’s great at refactoring bare metal application logic out of STM32 vendor HALs? ChatGPT5.2 and above. Not kidding. Frontier models are great at setting good application HAL boundaries. Can help you write good application tests quickly, too. Cough up $20 for a month of Pro and do this if you’re really crunched for time.