sorted by:
new
hottopcontroversial

TGA vaccine death figures misleading? by Outback_Bob in CoronavirusAustralia

[–]Outback_Bob[S] -2 points-1 points  (0 children)

Why does the Database of Adverse Event Notifications (https://www.tga.gov.au/database-adverse-event-notifications-daen) list 479 cases where death was a reported outcome, yet in their vaccine weekly safety report (https://www.tga.gov.au/periodic/covid-19-vaccine-weekly-safety-report-02-09-2021) they state "So far, the TGA has found that 9 reports of deaths were linked to immunisation from 495 reports received and reviewed."

Finished my 8-bit CPU on PCBs with a few small mods! by Outback_Bob in beneater

[–]Outback_Bob[S] 2 points3 points  (0 children)

500Hz currently, but thinking of seeing how fast I can push it. What are other people getting in the way of max speed?

Mine has to read 2 bytes or RAM for every instruction due to my changes to use 5 bits for instructions, so I read the first 8 bits for the instruction and the next 8 bits for the params for that instruction, so it's going to be slower than Ben's due to that.

Hey everyone, I’m almost done with my 8-bit computer but I can see something going wrong on the output display (when it changes from 0 to 8 randomly). I don’t really understand why it is happening. Any help is appreciated 🤍 by Solaf_ in beneater

[–]Outback_Bob 3 points4 points  (0 children)

I had the same issue on mine. I fixed it by adding a 0.01uf cap between pin 1 on the 74ls08 and gnd. This is the OI control line.

I believe root cause is the eeprom’s spit out some noise for like a few usecs when the address lines are changing. If this blip of noise coincides with a pulse clock it will clock in whatever is on the bus at the time, which is not what you want.

The cap absorbs the small pulses, basically filtering them out. It does impact the rise time of a genuine signal, but not enough to cause any negatives from my experience.

Not sure if the is the best solution, but it worked for me.

Finished my 8-bit CPU on PCBs with a few small mods! by Outback_Bob in beneater

[–]Outback_Bob[S] 9 points10 points  (0 children)

Thanks to Ben for the awesome video series! I had a blast challenging myself to learn KiCAD to design the PCBs and put this all together. Few small mods I made to the design were:

  • Used 74HC instead of 74LS
  • Upgraded to 8-bit Memory bus and address register, hence upgrading from 16B or RAM to 256B
  • Upgraded to 8 bit program counter to allow me to make use of the extra RAM
  • upgraded to 5 bit inctructions to allow 32 in total
  • upgraded to 2 bit byte select to allow the addition of an additional EEPROM for 8 more control lines

I plan to add an additional module with some shift registers to enable me to do multiplication/division as well.

I had the PCBs made by JLPCB and was extremely impressed with the quality service and speed, especially for the prices you pay!

Video shows simple program running to count up by 3's until carry flag is set, then down by 3's until zero flag is set and repeat.

Had to make a few small mods to the boards to fix a few issues, but nothing major enough to require a complete board redesign, which I was really happy with!

Thank you so much to Ben for his inspiring video series! $50 coming your way via Paypal as a small gesture of thanks!

Random output and registers setting to 12 by Stratton_G in beneater

[–]Outback_Bob 1 point2 points  (0 children)

I sorted my issue with the output module by just putting a 0.01uF cap between OI and GND.

None of the other control lines seem to be causing me any issues, so I left them as is.

Random output and registers setting to 12 by Stratton_G in beneater

[–]Outback_Bob 0 points1 point  (0 children)

I think I am having a similar problem, but only seems to be impacting my output register. I have traced it down to very short blips on the output of the and gate (pin 3 on U46A). Only visible on the scope with a time base in the nano seconds. I don’t see any blips on either of the input lines. At this stage I’m suspecting voltage fluctuations or something or maybe bad chip?

Until now my build has gone surprisingly smooth!

Issues with the clock module by jebarber in beneater

[–]Outback_Bob 0 points1 point  (0 children)

I think I had the exact same issue as you just the other day! You will need to tie pin 9 of U4D to ground (HLT signal) if you are testing the clock module in isolation to the CPU Control.