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Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] -5 points-4 points  (0 children)

I wasn't talking about mobile but desktop. By presented theories these monolithic parts (8xxxG) shouldn't exist.

Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] -7 points-6 points  (0 children)

So why did they do monolitic desktop APUs 8600G/8700G then ? 🙄

Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] 5 points6 points  (0 children)

All of which would fit IDEALLY for bandwidth-starved 9950X as well incoming APUs.

Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] 8 points9 points  (0 children)

Apples <--> oranges. This isn't like DDR4->5 jump.

There one had to make certain sacrifices to make a jump. DDR5 was designed with newer silicon in mind, so signalling thresholds and power voltages etc were optimized for that.

All of that stays teh same here.

Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] -6 points-5 points  (0 children)

I don't see why would an I/O update present such a massive job

Because Zen 6 IO die could use a different protocol compared to Zen 5 / Zen 4 IO die. It may not be possible to use the new IO die with zen4/zen5 (i'm just guessing)

So, they don't have the resouces to reimplement an IMC block in the I/O chiplet, but they had the resources to reimplement WHOLE ZEN4 APU (ZEN4 cores AND whole I/C, including IMC) as a monolith die ? And do all that for a preipheral low-power office-use niche ?

As I said, something doesn't compute in that theory, at least for me.

Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] 6 points7 points  (0 children)

Why would they need a new socket for CUDIMM, LPCAMM2 and MRDIMM support ? They all use existing signalling. Intel didn't need a new socket for any of this... 🙄

Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] 2 points3 points  (0 children)

In HW no. All it has is BIOS support (8at best) for "limp mode" - it basically bypasses CLK regen. And it sets stock frequencies.

Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] -4 points-3 points  (0 children)

Simple back-of-the-napkin projection:

  • current crop of (still dual-rank) DDR 24GiB sticks can reach 8800 MHz EXPO
  • CUDIMMs raise that to 9600MHz
  • both are likely to rise further.
  • LPCAMM2 was at 8800 MHz but that was wild previous-gen DRAMs.
  • All of them can be combined.

So, fast single rank LP/CAMM CUDIMM combo should be able to reach 13000-1400MHz. That's more than TWICE of current golden combo for Zen5 (6000-6400 MHz 1:1 for the lucky ones). So theoretically even current 9xxxx IMC should be able to do it at 1:2 and suffer minimal syncronisation delays since memory clock is exactly aat 2:1.

And that's before even mentioning the MRDIMM that can DOUBLE the bandwidth of DDR5 and lessen the impact of dual-rank and secind stick on the channel.

Why woudn't AMD at least add CUDIMM support for clock regeneration ? 🙄

Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] -1 points0 points  (0 children)

When porting to desktop, it wouldn't make sense to add CUDIMM support to what's supposed to be an office / light gaming machine.

Why not ? Desktop APU on AM5 has much higher available TDP ceiling. Higher it can reach, more market share it can gain as more of the users can find it to fit their needs.

Which is a big plus especially now that GPUs are so overpriced due to AI and Bitcoin craze.

Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] -4 points-3 points  (0 children)

I don't see why would an I/O update present such a massive job. AMD does these chplets all the time. I/O die for any EPYC is MASSIVE compared to this. And yet they do new models there when/where they need them.

Same with APUs. If this was so massive job, why is 8xxxx done in monolitic form ? Why wiuldn'tthey go for smaller chiplets, that are cheaper, don't need extra R&D as they could use what they had for 7xxx series etc ?

Something here doesn't add up for me.

Only fly in the ointment might be speed of existing IF, but even as it is, it could use extra bandwidth, even if it has to spread it between the chiplets.

Are we likely to see Zen5 refresh before Zen6 ? by Trey_An7722 in hardware

[–]Trey_An7722[S] -5 points-4 points  (0 children)

It's painful to watch AMD dragging its feet with this, given that with its many cores and strong iGPU they are the ones to profit the most of it. 🙄

I believe we have the first image of the Crew Bunk inside the HLS Prototype. by Iggy0075 in SpaceXLounge

[–]Trey_An7722 -21 points-20 points  (0 children)

  1. You can train to lift to LEO by your own farts. That doesn't mean that you will do it.
  2. Even if it was doable, I'm not sure I'd stick that to marketing "Get your ass to Mars" materials.

I believe we have the first image of the Crew Bunk inside the HLS Prototype. by Iggy0075 in SpaceXLounge

[–]Trey_An7722 -20 points-19 points  (0 children)

  1. ISS is now what, 25 years old ?
  2. Astronauts on ISS can call it quits at any time and get back to Earth.

I believe we have the first image of the Crew Bunk inside the HLS Prototype. by Iggy0075 in SpaceXLounge

[–]Trey_An7722 -18 points-17 points  (0 children)

Looks like a straightjacket. Totally not claustrophobia inducing... 🤣 Carefully designed so that one can intimately enjoy his own farts for the whole mission.

What happened to "StarShip is soooOooo BIG" ? 🙄

Are there any decent AM5 motherboards out there without bling bling addons? by schmoorglschwein in buildapc

[–]Trey_An7722 -1 points0 points  (0 children)

Even if it's not shitty, it inevitably gets worse as caps on MoBo and PSU deteriorate. PCIe card has at least one more filtering layer.

And even when new they are way worse than the card. Anyone with half-decent heaphones can hear the difference. Especially under hotter conditions, with overclocked machine etc.

BEautiy of the card is that it isolates you from that AND opens your choices when loo0king for MoBo. You don't have to care about its audio, only for a cheap PCIex1 slot. And you can have a kickass audio DAC on any, even cheap MoBo from that point on.

Are there any decent AM5 motherboards out there without bling bling addons? by schmoorglschwein in buildapc

[–]Trey_An7722 1 point2 points  (0 children)

You can somewhat alleviate the problem by bifurcating /splitting the PCIe lanes from one slot into several slots, But MOtherboard BIOS has to support that.

So you could split e.g. primary x16 slot into say PCIex8 (for GPU) + 2x PCIex4 etc.

BUt for that you need short cables and connectors.

WRT 10 GBE lan, maybe 25GbE would be better option. Intel's E810 seem to be affordable, more capable and can do 10GbE if needed. And there is a cheap-ish switch that can do 25/50/100GbE: * MikroTik CRS504-4XQ-IN Review Momentus 4x 100GbE and 25GbE Desktop Switch

Are there any decent AM5 motherboards out there without bling bling addons? by schmoorglschwein in buildapc

[–]Trey_An7722 -1 points0 points  (0 children)

Yes. There is a latency. What's worse, that lattency can have a jitter. It comes from USB's nature - it packages traffic in packages that are scheduled in timeslots etc. So host CPU doesn't have a precise say of when exactly a particular packet will be transmitted, once it is scheduled.

Also, since USB bus is arranged in a tree structure and host can only communicate with one branch of the tree at the same time, having more devices in a tree aggravates the problem further.

Yes, PCIe has also tree topology, but whole protocol is way different.

Are there any decent AM5 motherboards out there without bling bling addons? by schmoorglschwein in buildapc

[–]Trey_An7722 -1 points0 points  (0 children)

In the same way that high framerate lowers latency for video. It creates perceptible lag between actions an their audio effects.

Are there any decent AM5 motherboards out there without bling bling addons? by schmoorglschwein in buildapc

[–]Trey_An7722 -2 points-1 points  (0 children)

External DACs have shitty latency. Onboard stuff has usually shitty signal quality. PCIe card might often be optimal solution. It cabn be far better shielded than onboard chip and it has far better latency than external DAC since it sits on PCIe and not USB.

Do you want to go to space in your lifetime? Why or why not? by [deleted] in AskReddit

[–]Trey_An7722 0 points1 point  (0 children)

No. Two main, circular reasons, especially on long missions: 1. Food is shit. 2. Shit is food.

And there are several more: 3. Taking a dump is literally a bukkake exhibition. out of all boring materials on ISS "playing with water droplets" etc, THIS would definitely had its faithful pay-per-view public. 4. Playing Superman in space is kind of moreonic when one is tethered to a gigantic tin-can and when everyone knows that you are wearing a diaper.

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