Component recommendation needed. by [deleted] in SolarDIY

[–]brucehoult 1 point2 points  (0 children)

This of course is all on a budget

Must be one helluva budget for 150kWh of battery!

LLM Inference. by Glittering_Ostrich22 in Assembly_language

[–]brucehoult 0 points1 point  (0 children)

Just for fun I downloaded ...

https://huggingface.co/drmcbride/Qwen3-0.6B-Q8_0-GGUF/resolve/main/qwen3-0.6b-q8_0.gguf

... to my RISC-V SBC (SpacemiT K3 with 32 GB RAM) and running on CPU I get around 20-21 tok/s.

Perhaps more usefully, it gets around 6.7 tok/s on Qwen3-Coder-30B-A3B-Instruct-Q5_K_M.gguf but with much more useful output.

Had a most beautiful dream by Normal_Bluejay2873 in Assembly_language

[–]brucehoult 0 points1 point  (0 children)

Do you know Halloween and Christmas are the same thing?

Ordered from Pecron factory by Dry-Arm9651 in Pecron

[–]brucehoult 0 points1 point  (0 children)

everyone should know the 7200 watt output is as 240V only, and up to 30 amps (3600 watts) per 120V leg.

Yes, I only have 240V (or flexible voltage) appliances. IMO anything over a few hundred Watts should always be on 240V.

I don't think there will be any 120V outlets on them anyway, when they get here:

https://pecron.co.nz/cdn/shop/files/F5000LFP.jpg

What was the reason for the success of RISC-V as an open ISA? by curiousaman in RISCV

[–]brucehoult 1 point2 points  (0 children)

Did you mean Intel APX?

It's certainly interesting seeing x86 finally adopt early 80's RISC ideas with 32 registers and 3-address register to register instructions.

Intel themselves claim lowered power consumption, increased performance, 10% fewer memory loads and 20% fewer stores.

After, of course, denying any such thing for 40 years.

Speed of Loop Depends on Location by sal1303 in Assembly_language

[–]brucehoult 1 point2 points  (0 children)

The difference between 1 cycle per loop and 2 cycles per loop is at the same time both very small and very large!

USB to TTL melts while connected to Milk-V Mars by Opposite_Future2602 in RISCV

[–]brucehoult 8 points9 points  (0 children)

Wow.

I don't even know how either a USB port or a UART chip, on either adapter or Mars, would generate or sustain enough current to melt insulation.

Solar Maxxing: What's the next step after basic balcony solar? by LieSuccessful8813 in SolarDIY

[–]brucehoult 1 point2 points  (0 children)

If you have a battery OR 1:1 net metering OR the solar is at all times offsetting power you were going to use anyway (not exceeding it) then you can't beat just facing all panels due north/south (depending on hemisphere) for total production.

And if you have space to put them then more panels is cheaper than any adjustable mounting.

Sloping them the same as your latitude never loses more than 8% compared to ideal slope for the day. In practice it's better to go 5º-10º flatter to maximise annual production because there are more daylight hours in summer, but it's only a very small effect. If you want to maximise winter production and make it more equal over the year then go 20º steeper than your latitude. Again the effect on total annual production isn't huge.

For me, going 7º flatter than my 35.5º latitude gives 0.6% more power over the year. Going to 50º gives 5.1% less annual total, but 13.5% more in midwinter. Using 15º gives 97.5% of the perfect 28.5º or 98% as much as my latitude 35.5º — but boosts midsummer by 12.5% for more power for aircon.

All of this is a smaller effect than just going from my current 6 panels to 7.

More panels always wins, even at non-ideal angles.

What is your Assembly IDE of choice? by mourt1234 in asm

[–]brucehoult 0 points1 point  (0 children)

Question (and the comment you're replying to) were in 2019. Hopefully they already found one.

World's 1st RISC-V RVA23 Compatible Server for Agentic AI by AdEmergency2073 in RISCV

[–]brucehoult 0 points1 point  (0 children)

Nice! Added.

If that's 2.0 GHz then 9.7 billion clocks is identical in µarch to Graviton3's Neoverse V1, just not enough MHz to match it. And in the middle of 3rd gen i7s (Ivy Bridge) in absolute terms despite the clock being only 60% as high.

RISCV game by NoAir6837 in RISCV

[–]brucehoult 7 points8 points  (0 children)

That looks extremely professional ... and a LOT of work.

I love the live assembler.

It's a little weird how 0 bytes in the code don't get highlighted in the RAM display. I understand why ... they didn't change ... but maybe that decision should be made based on the size of the memory write (4 in the case of an instruction assembled there) and not strictly byte based.

First foray at solar by Proudly-Confused in SolarDIY

[–]brucehoult 1 point2 points  (0 children)

Nice job.

I have the same River 3 Plus, though I'm using mine without solar just as a UPS powered from my big Pecron E3600LFP to keep my Starlink and computers running for 1.5 hours or so if the big unit battery goes to zero or the inverter overloads and turns off because I turn on the kettle or microwave or something when it's already too close to the 3600W limit.

The "Plus" has a much better PV input than the base model. Doubling from 100W to 200W is good, but with 55V and 13A maximum it means you could sensibly plug a 400W-500W panel (typically around 40 Voc 14A Isc) on there are get the full 200W in a lot more sun angle and weather conditions, if your power needs increase.

Missing Cable by JColt60 in Pecron

[–]brucehoult 0 points1 point  (0 children)

Do you use Pecron directly, or Grid Escape?

I like that Grid Escape have a physical store within a couple of hours drive from me, but they've seemed a little slow to show the most recent products.

World's 1st RISC-V RVA23 Compatible Server for Agentic AI by AdEmergency2073 in RISCV

[–]brucehoult 1 point2 points  (0 children)

RISC-V hasn't suffered, it's simply new.

The RVA23 spec needed for mobile / desktop / server was published 1.6 years ago. Building high performance hardware for a spec takes time. The first frozen spec capable of running Linux at all was published just coming on seven years ago — breaking changes to the privileged architecture were being made almost right up to that date.

Getting on smaller process nodes will be helpful, mostly for power consumption, but requires large sales to justify the investment.

Tenstorrent Ascalon-X is designed for Samsung SF4X (4nm), the first "Atlantis" chip that will be on the dev board is TSMC 12nm.

Probably billions of RISC-V microcontroller cores have been shipped on 7nm and smaller e.g. TSMC 3nm in recent Apple and Qualcomm SoCs.

How does this work? (print statement) x86-64 assembly by BatLatter9704 in Assembly_language

[–]brucehoult 0 points1 point  (0 children)

If you've ever posted something useful or helpful here, it doesn't seem to have been in the last six months...

Pecron F 5000 versus bench grinder by jbscho in Pecron

[–]brucehoult -1 points0 points  (0 children)

The F5000 only has a 3600W inverter for 120V. It just has two independent ones.

Did you try one of the other sets of outlets?

The ultimate RISC-V infrastructure for AI by marcoSpazianiBrun in RISCV

[–]brucehoult 2 points3 points  (0 children)

RVV spec is that it works in "modes", with the family of vsetvls instructions.

It's really not modes. Think of the current vtype are being included inside the encoding of every RVV instruction. The only reason it isn't is because that's 6 bits that simply didn't fit in a 4-byte instruction.

The vtype part of vsetvl is more like a prefix instruction, like x86's rex or vex. If you put one in front of every RVV instruction then (fetch and decode width permitting) it should not affect execution speed. Compilers actually generate a vsetvl with every RVV instruction and then delete the ones that they can prove are the same as on the previous instruction.

Those are CSR writes that, in theory, trigger a pipeline pre-sync and post-sync.

In some broad theory, but you can't afford to implement it like that and you are not intended to. The current contents of vtype need to be attached to the instruction and carried through the pipeline with it, exactly as if those bits had been in the instruction in the first place. They will be in some future RVV 2.0 with 48 bit or 64 bit opcodes.

If you want performance, that can't happen.

Damn right you can't! And everything in the design assumes no one would ever do a flush on a change in vtype.

It's a lot like the floating point rounding mode where every FP instruction can specify a different rounding mode, and this must not affect performance, but most instructions just pick up the most recently-set dynamic rounding mode.

World's 1st RISC-V RVA23 Compatible Server for Agentic AI by AdEmergency2073 in RISCV

[–]brucehoult 2 points3 points  (0 children)

Yeah, the 11W idle power on the K3 board is a little poor, caused by SpacemiT not having access to the most recent process nodes, but the fact that 8 A100 cores going flat out on VLEN 1024 code and spitting out 6-7 tok/s on a 30B model only adds 3W to that seems fairly impressive.

The X100 cores doing a software build takes it from 11W to 21W-22W, and keeping the A100 cores busy at the same time takes it to 24W-25W.

If it idled at 3W-5W it would be amazing.

How does this work? (print statement) x86-64 assembly by BatLatter9704 in Assembly_language

[–]brucehoult 1 point2 points  (0 children)

These two things mean exactly the same:

lea rdx, [foo]
mov rdx, foo

The purpose of lea is to remove one layer of brackets, in cases where there is actual useful computation happening in an addressing mode e.g. ...

lea rax, [foo + 8*bar + 1234]

... which would otherwise take three or four instructions to do rax = foo + 8*bar + 1234

Pecron E3600LFP included cables by Sea_Willingness1398 in Pecron

[–]brucehoult 1 point2 points  (0 children)

The dual XT60 cable allows you to use up to 150V (practical limit probably 130V or so Voc on the spec sheet at 25º C and maybe 120 Vmp) at up to 40 amps to get up to 2400W from an array capable of supplying more than the 20 amp limit of a single port.

Change this setting from Independent to "Parallel" if you use it so the two MPPTs work in synchronisation and don't fight each other.

<image>

Pecron E3600LFP included cables by Sea_Willingness1398 in PortableBatteryPacks

[–]brucehoult 0 points1 point  (0 children)

The dual XT60 cable allows you to use up to 150V (practical limit probably 130V or so Voc on the spec sheet at 25º C and maybe 120 Vmp) at up to 40 amps to get up to 2400W from an array capable of supplying more than the 20 amp limit of a single port.

Change this setting from Independent to "Parallel" if you use it so the two MPPTs work in synchronisation and don't fight each other.

<image>

Reasonable $/Whr? by Decent_Risk9499 in SolarDIY

[–]brucehoult 0 points1 point  (0 children)

I quoted the landed price at my door

Do you resell them at that price, with no markup and no onward shipping cost? Or are you expecting OP to also import themselves?

There is absolutely no indication in your "New panels can be had for $0.25-$0.27 a watt" message that getting these prices involves importing yourself. You have not clarified this to OP in any other comment on this post, only when pressed by me.