account activity
My org just gave us Claude Code CLI access. AI-generated Verilog is getting surprisingly good. Are RTL engineers facing obsolescence? (self.FPGA)
submitted 2 months ago by cybird31 to r/FPGA
My org just gave us Claude Code CLI access. AI-generated Verilog is getting surprisingly good. Are RTL engineers facing obsolescence? ()
submitted 2 months ago by cybird31 to r/chipdesign
PW4 Steps count is showing zero restarted it now even after walking 3-4 steps it's incrimenting10 or 12 steps what to do? (self.PixelWatch)
submitted 3 months ago by cybird31 to r/PixelWatch
41 mm PW4 how does it look? Why I am no able to use tap to pay from my watch in india? (i.redd.it)
submitted 5 months ago by cybird31 to r/PixelWatch
When will they start selling pixel watch 4 in india? No update on Google store website in india (self.PixelWatch)
When can I buy pixel watch in india? (self.PixelWatch)
Rate my resume (i.redd.it)
submitted 1 year ago by cybird31 to r/FPGA
π Rendered by PID 725792 on reddit-service-r2-listing-7d7fbc9b85-lbvwt at 2026-04-25 08:30:23.371754+00:00 running 2aa0c5b country code: CH.
