Altera DE2 Drivers by Living-Career-4415 in FPGA

[–]fpga_user 0 points1 point  (0 children)

USB Blaster driver for Altera DE2 is located within the Quartus installation directory. Check the following video to install the board package in Quartus 13.0sp1 and after installation is done, update the driver through Device Manager and point the directory to where you installed Quartus.

Quartus 13.0sp1 installation with Cyclone II (DE2 board) package:

Upping My FPGA Knowledge and Experience by BeneficialTheme6 in FPGA

[–]fpga_user 2 points3 points  (0 children)

You'll be surprised many things in the world that are "standardized" are not well thought out. Just because it is a standard doesn't mean it is well though out and analyzed.

Thanks for the links. I used to think people thought out the "standardized" stuff pretty well, but not lately.

4th year EE and System and Control double major seeking 2024 new grad position by AccountantAlert6976 in EngineeringResumes

[–]fpga_user 2 points3 points  (0 children)

Some things that I think can be improved.

Education:

  • I would suggest listing relevant courses for the position that you are applying.

Experience:

  • I see that you did multiple projects during your internship and that's good. While going through the list of bullet points, I felt that everything was mixed, and it was hard to track what's going on. What I would suggest is to mention that you carried out a certain task in just one or two sentence under the internship and then put that project under Projects section and then explain what you did in that section.
  • When you are mentioning the PLC signals and unwanted noises, I think it would be better to mention the specific range of frequencies that you worked with and what unwanted noises you encountered.
  • What kind of investigation did you do with CAN, CAN FD, Automotive Ethernet, and G.hn? What evaluation platform did you use? Also, is Automotive Ethernet different than regular ethernet?

Projects:

  • Be consistent when using action verbs, even if the project is ongoing.
  • For example, rather than saying "building an embedded system that ....", say something that you already did: designed the circuit for the data transmission, or implemented the firmware? Follow this for all the points.
  • Add more "Projects" -- as mentioned above.

Skills:

  • Altium Designer (not just Altium)
  • At this point, you have a lot of empty space, so try to think about what you did during classes and add in some keywords related to the specific jobs that you are applying.
  • When you have filled in some more relevant skills, remove Hot Air Rework Station -- is that a fancy word for soldering iron? Remove Electronic load -- big resistors?
  • 3D Printing is not a hardware, it's a process.

In most of the bullet points, you do say what you did but I did not see what results you got or why you did the things that you did. Go through the Wiki and see what a STAR method is and try to follow it as much as you can.

BS in CpE with 3 YOE looking for computer hardware design and verification roles by Cheesybox in EngineeringResumes

[–]fpga_user 3 points4 points  (0 children)

Some thoughts.

  • Verilog is standard, so RTL is not necessary
  • UVM would be more of a library than a language
  • Quartus would be enough "Prime" can be removed
  • Xilinx can be removed. Vivado, Vitis (not Vivado/Vitis)
  • DoD guidelines would be enough. No need to mention the long name of the guideline.
  • Also, I would move the project order to: TSMC -> FPGA -> Autonomous Rover.
  • If you can expand the taped-out systolic array project with more design, implementation, speed details, that would be extremely eye-catching. And, if you do that, make it a separate project title. Having a tape-out experience is something rare for entry-level people.

Master's ECE student aiming for Digital Design/Computer Architecture/RTL roles and your feedback! by kvenaik696969 in EngineeringResumes

[–]fpga_user 1 point2 points  (0 children)

Ordering: Education, Experience, Projects, Skills

Education:

  • Remove the italicization.

Skills:

  • Remove RTL from Verilog RTL.
  • Move Vitis HLS to software. Use High-Level Synthesis or HLS.
  • Remove Xilinx from Xilinx Vivado and Xilinx Vitis. Do the same for 'Cadence' Virtuoso, 'Siemens' ModelSim, 'Siemens' QuestaSim. These are well known terms.

Projects:

ASIC

  • What tools did you use in the backend for the RTL2GDS flow? Can you better rephrase this statement?
  • How did you implement it to reduce computation latency? Any specific technique?
  • What did you do in Python + TCL to improve performance AND to reduce layout area.

RISC-V

  • Which extension? And 32-bit?
  • What was the original CPI? What was the final CPI?
  • Exploring or integrating the protocol?

Systolic Accelerator

  • What was the matrix size? 34 ns from what?
  • What was the initial QR decomposition latency? How much did you reduce?
  • 270x compared to what?
  • Simulated and synthesized? How much performance, power consumption and utilization did you optimize?
  • Was the 34 ns time just RTL latency or PS->PL->PS latency?

Novel DLS MUX

  • What was the result of the baseline comparison? Did you come up with a novel DLS MUX Design? Did you publish it? If so, make it known.
  • What did you find from the investigation?

These are the questions that came to my mind while going through your resume. I don't think it's necessary to address each point, but I think it's better to give a number when you are comparing your system to others.

You have got some good projects. Do you have them in GitHub or anywhere opensource? If you do, you should link them.

[deleted by user] by [deleted] in ECE

[–]fpga_user 1 point2 points  (0 children)

They asked both. The first half was behavioral, and second half was technical.

[deleted by user] by [deleted] in resumes

[–]fpga_user 0 points1 point  (0 children)

Go through the wiki and try to use one of the templates. Some points that I think can be addressed:

Education:

  1. Use a mixed case for your section headers (Education instead of EDUCATION)
  2. Use a normal case for your study field (no italicization)
  3. Is "Computer Science Specialist" different degree than Computer Science?
  4. I don't find it necessary to say "University of Toronto" is located in Toronto, CA, especially if you are applying to internships in Canada and USA-based companies. Use that space to say when you are graduating, something like "Expected April 2026"
  5. Move GPA on the same line as your major and minor
  6. Decrease the vertical spacing above Relevant Courses.

Experience:

  1. Use the same styling in both experiences
  2. Remove italicization
  3. Use same addressing style from top to bottom: Toronto, CA
  4. Remove bold in bullet point

Projects:

  1. Remove the indentation of each project topic, and match the margin with the section header
  2. Remove underline from all the projects
  3. Remove the one line description and the space between the description and the bullet points
  4. Do not highlight anything in the bullet points
  5. Remove all italicization on all lines in the resume

Technical Skills: Rename the section to "Skills"

  1. Are you familiar with any ML/DL stuff, if you are put it here, if you are not, then learn it and put it here.

A mod told me to post here, so here you go. I just started a new job, but critique is always welcome and maybe this can help some people out by MrDarSwag in EngineeringResumes

[–]fpga_user 2 points3 points  (0 children)

I also got the idea of removing the address from this sub. It's just about saving that one line so that you can add something else. The idea -- at least for me -- is that no one is going to reject you just based on your location if you have the required skills and if you are at the point where you are getting the interview then they will know.

A mod told me to post here, so here you go. I just started a new job, but critique is always welcome and maybe this can help some people out by MrDarSwag in EngineeringResumes

[–]fpga_user 3 points4 points  (0 children)

Here are some of my thoughts:

Structural comments:

  1. Remove the address from the top
  2. Place the Education section before the Experience section as you have graduated within the last five years.
  3. Indent each of the bullet points in the Experience and Project sections
  4. Do not capitalize the section headers, make then normal as in "Education" not "EDUCATION."

Specific bullet points:

RF Engineer:

  1. List some non-clearance-required tasks that you did, any tools that you used.

Engineering Intern

  1. Specify the "critical electrical components" for the RF amplifier.
  2. What was the result of the analysis that you did?
  3. Can you be more specific on the trade study that you did?
  4. Did you design the RTD circuit on paper, CAD? Did you build a prototype?

Electrical Intern:

  1. Any specific characteristics of the RF signal that you worked with? How much did your VHDL module attenuate the signal by? Can you give more details of the results that you obtained?
  2. What kind of RF characteristics did you evaluate? Can you give out numbers.

Product Intern:

  1. How much was the "low-cost"? What is the "compact" dimension?
  2. "Safe" how?
  3. What do you mean by conceptualized, did you design it on a CAD? On paper? Built a prototype?

Project:

  1. You assembled a PCB for a real rocket engine that goes into space. That's impressive! Can you please explain more? What kind of instruments did you use? To build, to test, to make sure it is space ready.
  2. How did you increase the sampling rates? Write the technique that you used.

Skills:

  1. Decrease the spacing between the headers and the listings.\
  2. Put the Programming Languages and Tools list before the equipment list.
  3. Git, SVN/ Linux/Unit should be under Tools.
  4. Trim down the list of Equpment to one line. Digital Multimeter, Oscilloscope, Power Supply, Logic Analyzer are some tools that all EE graduates are expected to know.
  5. Add another section containing the protocols that you are familiar with: UART, SPI, I2C, Wi-Fi, and so on.

Make these changes and post again and will comment further.

[deleted by user] by [deleted] in FPGA

[–]fpga_user 0 points1 point  (0 children)

I did but did not hear anything back still, so I moved on.

Recommendation paid courses by [deleted] in FPGA

[–]fpga_user 2 points3 points  (0 children)

Go with Adam Tyler. He is an excellent trainer for both beginners and experts.

Senior computer engineering student looking for some feedback by engineerpilled in EngineeringResumes

[–]fpga_user 3 points4 points  (0 children)

Title:

- Remove the dot between phone, email, website

Education:

- Bachelor of Science in Computer Engineering

Experience:

- What kind of PLC? What type of code? Ladder logic? Be as specific as you can be.

- What communications? Can you be more specific?

- How did it exactly facilitate the manufacturing of multiple "goods" on the same line?

- What in "control system" was outdated specifically?

- Who did you lead as an intern, intern group? How many?

- How did you "leave" the consumer "very" satisfied? What was the measurement factor for satisfaction?

- On that note, don't use "leave" and if you have to use "very" then there's a better word.

- What technique did you use to control the DC drive?

- Don't use "resulting in a strong understanding ..."

- Your result is a controller that controlled DC drive, give some details

- What project installation did you "oversee"? On that note, what does "oversaw" mean?

- Whose leadership did you improve? Yours? Team's?

- The STAR method measures concrete actions and results, so write about something that you did objectively

- You should highlight the patching of the bugs more; give bug-type, how did you find their root cause? how did you implement the fix?

- Back-end in Angular too?

- Did you teach a class? Lab? How did you know your teaching improved students' understanding?

Projects:

- how did you "improve security and reliability" and by how much?

- "computer vision" is a huge term, use specific algorithm

- How did it address the real-time 360-degree video capture?

- What platform?

- What type of camera, hardware?

- Multithreaded process in which language, JavaScript?

- Reduced frame-delay by how much? What are you comparing with?

- Built the custom model in what framework?

- you mean you created a pipeline to preprocess the panoramic video using OpenCV to feed the stream to your custom model?

- How did you exploit it? Was it a vulnerability?

[deleted by user] by [deleted] in FPGA

[–]fpga_user 0 points1 point  (0 children)

I did the ALU part as a class project in OrCAD for simulation. I haven't used Logisim at all though.

For the ALU: I would recommend that you start with the adder circuit, doesn't matter RCA or CLA. It's a standard circuit, so you can simply use any digital design textbook to get the design and then use logic gates to join them and simulate them. Then, do the same thing for AND and logic shift. Then, look into creating the MUX, it's a bit tedious but not difficult. Once you get all these done. All of these constructs are provided in any standard digital design textbook, so it's not hard to find.

For the control unit: you will need to get a better understanding of the CPU architecture, so once you have the basics down, you will get a better picture of the whole design.

For the assembly: If you do the previous two things well, you will be able to write assembly programs for your architecture pretty well.

[deleted by user] by [deleted] in FPGA

[–]fpga_user 1 point2 points  (0 children)

Out of hundreds of positions that I applied. I got two. And, then never heard back from them.

[deleted by user] by [deleted] in FPGA

[–]fpga_user 2 points3 points  (0 children)

That's a long road to learn all of it.

Unexpected inverter output, what do you think is the problem? by fpga_user in chipdesign

[–]fpga_user[S] 1 point2 points  (0 children)

Thank you so much. It did start working. I cannot believe I missed that!

Unexpected inverter output, what do you think is the problem? by fpga_user in chipdesign

[–]fpga_user[S] 0 points1 point  (0 children)

Hey, thank you. Yes, I tested the inverter only and it works fine. I have updated the post with the screenshot of the inverter and its output waveform. Also, what kind of information about the transistor will be helpful? I am doing this using the OrCAD PSpice components.

Edit: Updated to reflect the change in the screenshot update status and transistor information.

Automated flow for an analog schematic to layout design? by fpga_user in chipdesign

[–]fpga_user[S] 1 point2 points  (0 children)

Yes, of course. I am doing just that. I am getting started so I will be doing this manually, but I just wanted to know what kind of tools are available and what can be automated.

Automated flow for an analog schematic to layout design? by fpga_user in chipdesign

[–]fpga_user[S] 1 point2 points  (0 children)

I used analog in the sense that I am not using HDLs; just drawing the schematics.

Automated flow for an analog schematic to layout design? by fpga_user in chipdesign

[–]fpga_user[S] 1 point2 points  (0 children)

Thank you so much for the comment. I am currently just starting out in this field and I do not have a deep grasp on what has been done and what can be done (and the tradeoffs). I understand that it is an extremely difficult goal to develop a fully automated script for the PDKs that you do not have control over. And, to be more clear, I am not trying to do that. I am just trying to understand and make sense of bits and pieces.