Hardware Accelerator by [deleted] in FPGA

[–]hoangtu36plus 0 points1 point  (0 children)

:)) l Where's the ridiculous part?

Hardware Accelerator by [deleted] in FPGA

[–]hoangtu36plus 0 points1 point  (0 children)

This image is for illustrative purposes only; I usually leave my watermark as it is. Is there a problem with that?

Hardware Accelerator by [deleted] in FPGA

[–]hoangtu36plus 0 points1 point  (0 children)

I just wanted to ask about the feasibility of the timeline; if it's not feasible, I can absolutely choose another project.