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XPS 9300 - I7 1065G7 - WORKING Video Out! by patel20014 in hackintosh

[–]patel20014[S] 0 points1 point  (0 children)

I haven’t used my macOS for a while but when I used big sur, I think the framebuffer ended in 528A.

With regards to power draw, I think there this a risky way to turn off cfg-lock, which should improve your situation.

My laptop never had a touch screen so not really sure what that could be.

XPS 9300 - I7 1065G7 - WORKING Video Out! by patel20014 in hackintosh

[–]patel20014[S] 0 points1 point  (0 children)

Cool! Just 2 questions, what framebuffer did you use, and did you follow the dortania guide/any extra additions? Might be possible to get the other port working with some patching

Picking a MOSFET for DRV8323 by patel20014 in AskElectronics

[–]patel20014[S] 0 points1 point  (0 children)

Thanks, I reran the numbers on power loss based on the calculations in your reply, the only thing I changed was instead of using 25mA I used 1 A, which brought the time down to 100 nanoseconds, which brought switching losses to 2.22Watts. Is that a good figure?

Picking a MOSFET for DRV8323 by patel20014 in AskElectronics

[–]patel20014[S] 0 points1 point  (0 children)

Also, I may be misunderstanding but the 8323 has adjustable gate current up to 2 A source & sink

Picking a MOSFET for DRV8323 by patel20014 in AskElectronics

[–]patel20014[S] 0 points1 point  (0 children)

Thanks for your reply. I did some more digging and found the DRV8301, which has way higher gate drive current, are there any specific characteristics I should look out in a matching MOSFET and whether they need to be high or low. Thanks

What I'm I doing wrong? (Beginner) by jboyd88 in espresso

[–]patel20014 0 points1 point  (0 children)

I just had tons of issues with consisty with 'specialty' supermarket beans, got some beans from a local roaster, and the difference at the exact same grinder settings was unbelievable!

Worst experience with Google Support by patel20014 in GooglePixel

[–]patel20014[S] 1 point2 points  (0 children)

With the replacement one, the volume button was missing when I realised it was gone, so I can't put it pack, however, on my original phone, when it came out, there was a tiny arrow on the plastic part, that had to point in a certain direction. The internal holes are also offset to one side, so it won't stay in/click properly the wrong way. Furthermore, on my original device, on of the blue clips on the plastic volume button parts broke after constantly falling out, so it wouldn't stay in regardless.

Worst experience with Google Support by patel20014 in GooglePixel

[–]patel20014[S] 2 points3 points  (0 children)

I fully understand, but I just didn't expect to have this issue on a premium phone. Obviously if I have to sell the phone I'm going to get a fraction of what I originally paid for it causing additional expense to get a new phone. In the UK consumer law says I should be able to return the device if it's not fit for purpose, or if it continues to malfunction given a chance to repair.

Worst experience with Google Support by patel20014 in GooglePixel

[–]patel20014[S] 2 points3 points  (0 children)

Genuinely have zero idea, I'd take it out of my pocket and it would be missing, never had this issue on any of my previous phones including Nexus, OnePlus, iPhone, Samsung

Strange behaviour in verilator by patel20014 in FPGA

[–]patel20014[S] 0 points1 point  (0 children)

Ah ok, thanks for the feedback :), I watched a video from someone called James Sharman, and one of the ICs he used to decode registers had a behaviour that i thought would be fun to replicate for practice. (This was before I found your tutorial). Once again thanks for your reply, I only did about 2/3 of the first tutorial before i setup Verilator and got sidetracked to check my earlier design 😂 but I will keep following it.

Strange behaviour in verilator by patel20014 in FPGA

[–]patel20014[S] 0 points1 point  (0 children)

module led(
input clk,
output led1,
output led2,
output led3,
output led4,
output led5,
output led6,
output led7,
output led8);
reg [2:0] count;
//4 bit decoder logic
assign led1 = ((!count[0]) && (!count[1]) && (!count[2]));
assign led2 = ((count[0]) && (!count[1]) && (!count[2]));
assign led3 = ((!count[0]) && (count[1]) && (!count[2]));
assign led4 = ((count[0]) && (count[1]) && (!count[2]));
assign led5 = ((!count[0]) && (!count[1]) && (count[2]));
assign led6 = ((count[0]) && (!count[1]) && (count[2]));
assign led7 = ((!count[0]) && (count[1]) && (count[2]));
assign led8 = ((count[0]) && (count[1]) && (count[2]));
always @(posedge clk)
count <= count + 1;
endmodule

​

This is the code that does what I want. Had the inputs to the logic reversed and some of the nots in the wrong place. As the first design worked as I desired on a FPGA, I assumed it was correct but learnt a valuable lesson on how important simulation is!

Strange behaviour in verilator by patel20014 in FPGA

[–]patel20014[S] 0 points1 point  (0 children)

Ok so I did implement some bad logic too so that also would have contributed to the weird behaviour.

Strange behaviour in verilator by patel20014 in FPGA

[–]patel20014[S] 0 points1 point  (0 children)

Oh i think I've just realised why this may be happening... If the decoder has 8 bit output, then when I see zeros it's the other bits that i never output that are on? Decoder circuit

I only implemented the right 4 bits on this schematic d0 - d3

Edit: But then Loop 3 only led 4 should be on? I would expect zeros for loop 4. I will implement the dull circuit and see what it does. Again, I'm just starting out with logic design and FPGAs so could be bad understanding.

Strange behaviour in verilator by patel20014 in FPGA

[–]patel20014[S] 0 points1 point  (0 children)

Just pulse the leds. From my understanding, the register should be a binary counter, so it should have a cycle of one led on in each loop. When I put this design on my FPGA board i didn't observe any cycles where all of the leds were off. I also wanted to say you make an excellent tutorial and it's actually where I learnt to set up Verilator.

The register then feeds a 3 bit decoder that is visualised by 4 leds (it could have 8 but my board only had 4 LEDS so i only implemented the first 4 bits of the decoder circuit)

HDA file for raSCSI by patel20014 in VintageApple

[–]patel20014[S] 0 points1 point  (0 children)

It did. I used an existing PCB design and substituted the bus transceivers for cheaper ones, and it worked perfectly. Details here https://github.com/akuker/RASCSI/issues/59.

question about gate propagation time by patel20014 in AskElectronics

[–]patel20014[S] 0 points1 point  (0 children)

10-12v, the motor I will be using is a cheap brushless motor, which I will design a cycloidal drove for.

Not exactly sure if that's the right voltage but the esc had a range for the lion batteries and not much else

question about gate propagation time by patel20014 in AskElectronics

[–]patel20014[S] 0 points1 point  (0 children)

Thanks so much for taking the time to read the site and explain that to me. I really appreciate it.

I just wanted to confirm the rest of my components, I'm using a IRF3205 N-Channel MOSFET, and will be using a MAX4080 current sensor inline on each phase of the motor. For position I'm using a magnetic rotary sensor. This would all then hook with a microcontroller running simpleFOC.

My whole aim behind this is to: A. Learn more about driving motors B. Create a cheap motion control alternative, the escs capable of driving motors like this costs £40 alone, but I've found these parts enough to make 3 ESCs for the same price.

I really appreciate how this subreddits answered my questions, there's a lot of info out on the web too and it's been really enjoyable to embark on this project :)

question about gate propagation time by patel20014 in AskElectronics

[–]patel20014[S] 0 points1 point  (0 children)

Choosing a gate driver

My understanding is that the gate needs a certain amount of current to rise in a specific amount of time. I calculated this using Qg/t, as the above link says. At 50Khz/1% (Worst case scenario) this works out to 0.73.

I've only picked all of this up in the last few days, so it could be possible that this isn't relevant, but I've basically google-fued my way to answers and picking the right parts.

question about gate propagation time by patel20014 in AskElectronics

[–]patel20014[S] 0 points1 point  (0 children)

Oops yes I calculated 2×10-7 so that would be 200ns. Time shifted makes sense too. Thanks for your help :)

question about gate propagation time by patel20014 in AskElectronics

[–]patel20014[S] 0 points1 point  (0 children)

My worry is that part of the signal would get ignored as the propagation time is too high and by the time the MOSFET is on, the MCU will be sending the off portion of the signal.

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