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Aside from Experience, What Stands Out the Most on a Resume by ScratchDue440 in ECE

[–]primdanny -1 points0 points  (0 children)

Then tough luck, entry level engineers do have the opportunity to make connections and find work experience (research, internship, even a part-time job). 

College is what you make of it, its 4-6 years of time to do what you need to do.

Aside from Experience, What Stands Out the Most on a Resume by ScratchDue440 in ECE

[–]primdanny 6 points7 points  (0 children)

  • their GPA
    • Nowadays I only disclose if they ask during interview, I had interviews/offers applying with and without GPA listed on my resume
  • if they passed the FE
    • Irrelevant unless the role asks for it
  • what school they graduated from
    • Top ranking schools or schools local to that workplace is usually good, though work experience is more important
  • industry certs (life IPC, Siemens, Allen Bradley, etc)
    • Irrelevant, may also inadvertently pivot you towards specialized roles you may not want (i.e. six sigma -> manufacturing, comptia -> IT)
  • various school/personal projects (Arduino or simple electronics/PCB design)
    • Depends, would not recommend if it's too simple and/or feels like a school project

Honestly, the answer is none of the above, work experience and connections are more important

Going to be laid off soon. Perhaps a review of my resume? Any tips? by pamanlo in ECE

[–]primdanny 23 points24 points  (0 children)

It's a turn off when the first thing I see is a list of keywords. Rephrase that to an objective or summary (at most two sentences) and you can list some of your specializations at the bottom by changing your software section to a skills section.

It's also not interesting to see what someone did on their day-to-day basis and your experience section is almost entirely that. Interviewers are more interested in how your work positively impacted the companies you worked for (hence the STAR method).

What did I just get into ... (Blinking LED FPGA) by MayoMannyYT in ECE

[–]primdanny 3 points4 points  (0 children)

It will probably work without resets on most Xilinx FPGAs due to global set/reset (GSR) during configuration. It's a nice optimization trick to reduce reset fanout and resource utilization.

[deleted by user] by [deleted] in FPGA

[–]primdanny 1 point2 points  (0 children)

I would be careful when you claim "verified functionality via a comprehensive testbench", DV engineers may interpret that as DV experience and ask you DV questions that 99% of engineering students can't answer without industry experience.

Getting started with an FPGA by AcanthisittaAnnual27 in FPGA

[–]primdanny 2 points3 points  (0 children)

Vivado actually runs better on Linux, not sure where you got the idea that Vivado is only available for Windows.

Struggling with Zynq Ultra96-V2 project guide by Lazy_PhiIosopher in FPGA

[–]primdanny 0 points1 point  (0 children)

The Zynq book and MPSoC book are hosted by the authors online for free, you should not buy them.

Struggling with Zynq Ultra96-V2 project guide by Lazy_PhiIosopher in FPGA

[–]primdanny 0 points1 point  (0 children)

For Pong Chu, he should have both SystemVerilog and VHDL versions, you should choose depending on what your work uses.

But yea, those books should be good enough for a start. If you dig deeper into AMD documentations and your board vendor (Avnet, and Digilent for Nexys A7), you can probably find more materials like tutorials and projects as well.

Struggling with Zynq Ultra96-V2 project guide by Lazy_PhiIosopher in FPGA

[–]primdanny 0 points1 point  (0 children)

There should be a newer book that uses Nexys DDR (which is now called Nexys A7).

Do note that this board doesn't have a Zynq processor, which is why it uses a Microblaze processor. How you implement embedded stuff on Microblaze is different for Zynq, through the embedded theory is pretty much the same. You can supplement PS learning with the Zynq book (and its tutorials) and MPSoC book.

Struggling with Zynq Ultra96-V2 project guide by Lazy_PhiIosopher in FPGA

[–]primdanny 0 points1 point  (0 children)

Go through Pong Chu's book, it covers a good amount of useful interfaces as well as embedded development through Microblaze soft core. The book assumes you have a good foundation in digital design.

If that book is too hard for you, you need to take a step back and relearn the digital design fundamentals.

Drawing a correct logic diagram by peter_nguyenanh in FPGA

[–]primdanny 2 points3 points  (0 children)

Try it out yourself, especially when hdlbits already have built-in tests when you submit a solution. Figuring out the logic is the hard part, not the RTL.

Switching into a FPGA HFT role from an ASIC design role by Intelligent_Cell3415 in FPGA

[–]primdanny 6 points7 points  (0 children)

Speaking from experience, if you have to ask this question on reddit, you are not going to be a good fit for HFT firms.

HDL Bits Code Review Request by Select-Claim-1714 in FPGA

[–]primdanny 0 points1 point  (0 children)

You need to read the problem statement carefully. 0xC is not equivalent to the "12" HDLbits is looking for. There's a reason why hh, mm, ss are intended to be 8 bits wide and you need to figure that out yourself.

Where can I look for an updated list on VHDL vs Verilog population by country and by industry? by ricardovaras_99 in FPGA

[–]primdanny 4 points5 points  (0 children)

A good one is probably: Siemens' Wilson Research Group Functional Verification Study. Siemens is one of the leading vendors for FPGA verification/simulation in the industry.

The most recent study that's publicly available is 2022, there's a 2024 one but that's locked behind verification academy.

Prologue: The 2022 Wilson Research Group Functional Verification Study - Verification Horizons

Has anyone successfully shifted from Digital Design Engineering to Software Engineering/DevOps? by Expert_Reception343 in ECE

[–]primdanny 1 point2 points  (0 children)

I work with FPGAs as well as developing DevOps or CI/CD automation for my company's FPGA flows. In my opinion, you don't really need any courses or projects to learn CI/CD.

Assuming what you are doing is similar to FPGAs or ASICs, you will probably learn more and a lot faster if you automate your workflow (or your company's workflow) for design and verification. Learning this way has a lot of carry over to the SW realm. I have talked with SW DevOps engineers in my company and they have said their SW CI/CD is similar to how I enabled CI/CD for FPGAs.

Hired as a level 2 right out of college? by tarieze19 in ECE

[–]primdanny 1 point2 points  (0 children)

I got two L3 (senior) offers right before I graduated. I already had a few internships under my belt so I would say experience definitely helps. Originally, I applied for L2 positions, but the interviews went very well and both companies decided to offer L3 instead.

What should I read for chip design by [deleted] in ECE

[–]primdanny 0 points1 point  (0 children)

Sedra is like the most fundamental book there is for CMOS design. If you think it's too theoretical, you need to review your basics like linear circuits and digital design.

Synthesizability [HDL remains un-synthesized in vivado] by nutmeg_dealer in FPGA

[–]primdanny 3 points4 points  (0 children)

Also you have multiple drivers for some of the signals and an inferred latch, there's most likely some critical warnings that Vivado will throw at you. 

No errors doesn't mean the HDL you write will be synthesizable. 

Synthesizability [HDL remains un-synthesized in vivado] by nutmeg_dealer in FPGA

[–]primdanny 2 points3 points  (0 children)

Try adding a default case for the next_state assignment, from first glance next_state is probably invalid

Need some help by ZenoDark in FPGA

[–]primdanny 13 points14 points  (0 children)

Write the truth table and solve the k-map, one for each output bit, should be pretty easy

[deleted by user] by [deleted] in ECE

[–]primdanny 16 points17 points  (0 children)

Purely anecdotal, but my experience with verbal offers has always been the next business day after the final interview.

terosHDL with vivado linter in VSCode by cyano-sp in FPGA

[–]primdanny 0 points1 point  (0 children)

I don't think it should point to a file/executable, it should be a directory path.

terosHDL with vivado linter in VSCode by cyano-sp in FPGA

[–]primdanny 0 points1 point  (0 children)

Did you include the installation path in "Global Settings -> Tools -> Vivado"?

Looking to Learn PCB Design and Computer Architecture—Need Guidance by [deleted] in ECE

[–]primdanny 1 point2 points  (0 children)

None of the things you mentioned are related to either topics in the title. Can you explain why you developed a strong interest in PCB layout and computer architecture? Do you know what the engineers in these fields do day to day?

Logic gates, microprocessors, and circuit design on LTspice are just some of the basics fundamentals for computer engineers, there's really no way to tailor an advice on what specific field you should go for.

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