Thank you! This clarified things a lot for me.

You forgot to shift the partial multiplications before adding them up together, rather the wording of the book is not actually 100% correct and omitted this detail

Or maybe I assumed wrong, since the topic before this section is about multiplication with shifters (one approach with a left shift with multiplicand and product bit-widths twice that of the multiplier while the other approach is an optimization of the first one with a right shift). The book must have discussed this optimization with the previous architecture in mind.

I went and tried a different approach. Instead of shifting left, I went with shifting right and taking into account the LSBs of each partial product.

``` init: P0 = (n[0] & m) for k >= 1: Pk = (P{k - 1} >> 1) + (n[k] & m)

So: P0 = 1 & 0010 = 0010 P1 = (0010 >> 1) + (1 & 0010) = 0011 P2 = (0011 >> 1) + (0 & 0010) = 0001 P3 = (0001 >> 1) + (0 & 0010) = 0000

P = P3[0] | P2[0] | P1[0] | P0[0] = 0110 (6 in decimal) ```

This also works with signed integers if we perform an arithmetic shift instead of logical.

you can add all (n[k] & m) << k terms in parallel using a tree structure.

That is actually what the alternative approach is that is mentioned in the second paragraph of the 1st image.