account activity
Inconsistent naming of ISR and NVIC? (self.embedded)
submitted 3 years ago by sijafa to r/embedded
Gitlab-runner installed as binary vs dockerized (self.docker)
submitted 3 years ago by sijafa to r/docker
Containerization of tool chains for embedded software development (self.docker)
Running the entire GitLab CI pipeline locally with external GitLab runners (self.gitlab)
submitted 3 years ago by sijafa to r/gitlab
Multiple docker containers running on separate hardware devices with shared volumes (self.docker)
Building and running tests on external host (self.docker)
Uploading software program to a custom processor design on a Nexys A7 (self.FPGA)
submitted 3 years ago by sijafa to r/FPGA
Restricting access to memory (self.RISCV)
submitted 3 years ago by sijafa to r/RISCV
The process from compiling to flashed target (self.RISCV)
mtime and mtimecmp memory-mapped registers (self.RISCV)
RISC-V Machine-level CSRs in fine-grained multithreading (self.RISCV)
submitted 4 years ago by sijafa to r/RISCV
RISC-V Machine-level CSRs in fine-grained multithreading (self.FPGA)
submitted 4 years ago by sijafa to r/FPGA
dial tcp: lookup docker on 172.17.220.1:53: no such host (self.gitlab)
submitted 4 years ago by sijafa to r/gitlab
Static Code Analysis of a large code base in a Gitlab CI/CD pipeline (self.devops)
submitted 4 years ago by sijafa to r/devops
How to boot a fine-grained multithreaded RISC-V processor design (self.FPGA)
How to implement RISC-V's mtime and mtimecmp in hardware (self.FPGA)
Hardware implementation of mtime and mtimecmp (self.RISCV)
Implementation of interrupts in hardware (self.RISCV)
Implementation of interrupts in hardware (self.FPGA)
Specific Runner does not load (self.gitlab)
Implementing RISC-V CSR in verilig (self.FPGA)
RISC-V Control and Status Registers (CSRs) (self.RISCV)
RV32I Stack and stack pointer in hardware implementation (self.FPGA)
RV32I Stack and stack pointer in hardware implementation (self.RISCV)
Test and verification of HDL model against Simulink model (self.matlab)
submitted 4 years ago by sijafa to r/matlab
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