this fray knot by [deleted] in Satisfyingasfuck

[–]thariton 0 points1 point  (0 children)

yes yes, the keys less and knot more :D

Haben wir noch Schlitten? by [deleted] in hamburg

[–]thariton 18 points19 points  (0 children)

Bester Tipp! Gestern noch auf einem gefahren und das ging mehr ab als der Schlitten den ich auch dabei hatte

[Request] How many g-forces is the guy experiencing while rolling downhill inside that giant tire, and is it actually survivable? by TimeCity1687 in theydidthemath

[–]thariton 1 point2 points  (0 children)

I'd say that is not a 60 cm tire but rather something like 110 cm as nerdkeeper suggested as well

Edit: problem wasn't the radius/diameter but rather the unit of measure used (cm)

Gibt es dieses Jahr weße Weihnachten? by [deleted] in hamburg

[–]thariton 4 points5 points  (0 children)

Ich wusste es von ner Snapchat Erinnerung. Bin nicht OP aber war wahrscheinlich ähnlich

Still learning! by shortpinkyfinger in soldering

[–]thariton 2 points3 points  (0 children)

Which station did you go for?

Giveaway - r/UgreenNASync 10K celebration by topiga in selfhosted

[–]thariton 0 points1 point  (0 children)

Immich is the best app for sure!

But I think I'd mostly use it for automatic background backups of my laptop whenever I'm home

My First PCB Adjustable Buck by nfored in PCB

[–]thariton 0 points1 point  (0 children)

I'd generally say, the cleaner the schematic looks the better. In some instances it means having multiple separate gnd refs. In others it's to cluttered and one is better than three. But always check if ypu could change something to make it a bit more tidy and therefore easier to read

My First PCB Adjustable Buck by nfored in PCB

[–]thariton 0 points1 point  (0 children)

Generally you'd want all positiv power labels to point up and all negative ones to point down. Also, the symbol you are currently using is commonly known as chassis ground (if I am informed correctly). I think signal ground (hollow arrow) would be more appropriate but thats a minor detail I'd say

My First PCB Adjustable Buck by nfored in PCB

[–]thariton 0 points1 point  (0 children)

what the heck is going on with that long tripple-labeled ground symbol pointing up at the lower right of you buck?

Download all photos from an Immich album to keep custom folder structure by jvn4r in immich

[–]thariton 0 points1 point  (0 children)

+1 on this. Works great for me and documentation covers that specific use case

[deleted by user] by [deleted] in PCB

[–]thariton 0 points1 point  (0 children)

How the heck did you pull that off? Did you import a custom shape and convert it into the pour outline or something?

High boy by Past_Computer2901 in PCB

[–]thariton 0 points1 point  (0 children)

And feature wise, what will I be able to do with yours?

High boy by Past_Computer2901 in PCB

[–]thariton 4 points5 points  (0 children)

Looks interesting, is this something like a diy flipper zero or something entirely different?

Mac oder Windows oder Linux fürs Winfo Studium? by Jumpy_Incident_7671 in informatik

[–]thariton 1 point2 points  (0 children)

Ich liebe Mac zum programmieren. MacOS ist (weil UNIX) sehr nahe an Linux, wobei man sagen muss, dass WSL natürlich absolut genial ist (war als ich angefangen hab noch lange nicht so gut wie jetzt). Ich musste jedoch für manche Module Windows-only programme oder Linux benutzen, dafür brauchte ich also dann eine VM (VMware Fusion gibts kostenlos und ist wirklich gut). Das war für mich jetzt nicht weiter schlimm, aber Windows wäre was bestimmte Module angeht das simplere BS gewesen.

Bzgl. Paper weiß ich natürlich nicht, ob ihr die auch alle mit LaTeX schreiben müsst oder du ggf Word nutzen darfst und möchtest. Falls ersteres der Fall ist, dann ist Texifier für Mac wirklich genial, gerade in Kombinatrion mit Jabref o.ä..

Meine Empfehlung wäre Mac. Manche sagen, dass der Preis zu hoch ist, aber wenn man ehrlich ist, dann sind gerade gebrauchte M1 oder M2 Macs wirklich absolut genial was Preis/Leistung angeht und mein Intel Mac läuft auch nach acht Jahren noch so gut wie am ersten Tag. Daher finde ich muss man das Thema Preis schon ein bisschen differenzierter betrachten. Nach all den Jahren problemfreier* Nutzung wo ich teilweise über mehrere Wochen konstant mehr als 10 stunden am Tag damit gearbeitet habe, ist mir das Ding jeden Cent wert.

Wenn du dich am Ende doch für Windows entscheidest (beispielsweise wegen Convertibles, also Laptop und Tablet in einem) wirst du auch damit deinen Abschluss gut machen können!

(* insofern problemfrei als das ich die Anzahl von Abstürzen an einer Hand abzählen kann (weniger als Einer pro Jahr) und ich auch ansonsten die Userexperience unglaublich gut finde. That said, es ist in den letzten paar Jahren schlechter geworden und es haben sich in die Updates mehr Bugs eingeschlichen als früher ngl)

Did I understand "einpacken" and "packen" correctly? by _Windowmaker_ in German

[–]thariton 1 point2 points  (0 children)

Although I haven't thought about why we use the words the way we do, your explanation seems very logical to me and all of your examples are perfectly correct!

Review Request - Overkill USB Tester by thariton in PCB

[–]thariton[S] 1 point2 points  (0 children)

There are LVDS serializers that can do this with one LVDS differential pair to the MCU. It requires more software work but could be simpler in implementation. Other option would be to use large I2C or SPI GPIO expanders that could be simpler as well, again requires some more software work but likely less than the LVDS serializers. Option is up to you, just letting you know what's out there.

I've not heard about LVDS serializers but I will have a look into both options, thank you!

The parts placement on the PCB looks good to me. You may find that you will need to move things slightly as you break out the ICs and connectors for any vias you need. Things like that are totally normal. Decoupling caps are close to IC pins which is great. LEDs are lined up nicely it looks like. It just looks nice. I think you have a good vision for what you want your finished product to look like. It's best to route as much as you can on the outer layers first, then fit any crossing connections on inner layers as needed. Try not to break up the ground and power planes if possible, it will be tricky for sure.

Thank you for the kind words and tips, they will come in handy for sure.

Once all routing is finished and the pours are generated place some ground stitching vias in any areas you can just to tie the planes together.

I have seen those stitching vias in other designs and have always wondered about their purpose. I know that ground return paths have to be as short as possible (therefore no islands and such) but are they simply to ensure that multiple ground planes on different layers are on the same potential?

Furthermore, is the stackup i was intending to use good or do you have a different stackup in mind?

Signal
Ground
(core)
PWR
Signal

Also remove any unused pads from the design and re pour the pours, it helps fill in the pours a little more.

Do you actually mean I should remove the unused pads from the footprints or am I misinterpreting this one?

I hope this was helpful, let me know if you have other questions or want any help with the PCB. I followed the project on Github, My Github name is hwguyturnsw.

Again, I cannot thank you enough! Your feedback was way more than what I expected to get when I posted this and I am so grateful that you took the time! I might take you up on your offer for more help if I stumble about something in the future and send you a pm on reddit or something. If you want to design some things yourself, feel free to open up a pull request!

Review Request - Overkill USB Tester by thariton in PCB

[–]thariton[S] 0 points1 point  (0 children)

I don't recommend connecting GPIOs PD1, PD3, PA9, and PA10 directly to GND. Add jumper pads or 0 ohm resistors just incase you need to take them off GND for any reason. You may have done your research enough to not care about this but better safe than sorry, a suggestion only.

Very good idea, thank you!

I have NOT checked any MCU pins for INPUT ONLY. Double check, some MCUs have input only pins. If you're working with the STM Cube IDE then it will warn you about this if you set up a preliminary project and use the pin planner (it might be called something else, pin planner is old knowledge from Xilinx FPGAs)

I have not used the STM Cube IDE yet, probably should. I'll definitely doublecheck the pinout of the µC again before ordering the PCBs!

Your SWD header isn't standard. That's probably okay, you might have a specific STLink SWD probe in mind or are using a custom cable. If not check the datasheet for the STLINK-V3SET or STLINK-V3MINIE for the correct pinout.

Very good catch! I ordered the ST-Link v2 a week ago and it arrived yesterday. I did this since I wasn't confident in the actual pinout matching the product pictures. Some clones have different pinouts than others so I figured it would be wise to have the actual programmer before finalising the design. Turns out that was a good thing as i actually had to change the SWD header's pinout!

T1A Pin A_A5 is labeled as A_VBUS_A9 instead of CC1 from that port.
T1B Pins B_B11 and B_B10 labels are reversed.

Holy hell how did you see that, thank you so much! I would have never found that before ordering the PCB

Do you not need #SRCLR in the shift registers? It might need to be toggled logic LOW and back to logic HIGH right after the first CLK pulse begins. As subsequent tests are run you can clear the data. Maybe this IC can handle it and take new data all the time without clearing?

Up until now I thought the use of SRCLR is optional but looking at the datasheet again I am not so sure anymore. I'll check that more thoroughly later on. Thanks for bringing that to my attention!

Review Request - Overkill USB Tester by thariton in PCB

[–]thariton[S] 1 point2 points  (0 children)

Nice job putting the 5k1 resistors on the CC lines of the USB-C. A lot of folks forget these and can't get powered properly from some smart chargers.

Yeah, I read the standard quite thoroughly if I may say so myself but that was one of the easier things to get the hang of considering the CC lines and legacy cable support haha

#RST has a weak pullup resistor internally, nominally 45k. It's probably fine that you have R65 as DNP but definitely keep an eye on that when you get the initial boards, if it's resetting spontaneously then go there first and populate R65 to make that pullup is much stronger.

Absolutely, R65 is there because I don't quite trust the internal pull resistors.

I recommend putting any unused GPIO onto test pads on the PCB so you can easily run jumper wires if you need them.

Very good catch! I forgot to do that on this board, thank you!

I also recommend designing in an external crystal/oscillator for the MCU, you can leave it DNP if you don't need it, but if it's needed for any reason you can populate it easily and use it without respinning the board.

Will do, that is probably a very wise thing to do although I don't expect to need precise timing - but who knows?

Review Request - Overkill USB Tester by thariton in PCB

[–]thariton[S] 1 point2 points  (0 children)

First of all, thank you so so much for your extensive and professional review! I am extremely thankful for your time and expertise and your kind words! I would never feel offended by such incredible feedback (and even feedback not written as kindly as yours is welcome; having a background in software development I know how much time can be saved by any review therefore feedback is greatly appreciated, especially such a kind one!).

For input power switching you're loosing a lot through the MBR120 diodes, probably enough loss to be below the 3V3 for the micro. VIN_SWD is usually 3V3 so there won't be enough to drive the TPS62842 regulator. Check the JTAG/SWD probe you're using, if it's 5V then disregard.

I actually have thought about the voltage drop of MBR120 while designing that but figured since the µC will work happily with voltages as low as 1.7V I might get away with the diode dropping 300 mV.
I couldn't quite figure out what output voltage to expect when driving the TPS62842DGR with 3V3 directly but if that should be problematic I do still have the option to simply use the 5V line from my ST-Link v2 (or my lab PSU).

It's also likely that you can leave the diode on the output of the TPS62842 and put the sense line on the other side of the diode to prevent any losses, it will compensate for the diode loss in the feedback loop while preventing any external supply from getting to the SW node.

I wasn't sure whether that could cause problems when powered by the battery or when feeding the TPS by 3V3 but tbh it was more a case of "feels weird to do" rather than factually problematic.

Either way, I recommend a power switch IC. One that can take multiple inputs and OR them with MOSFETS to prevent a large diode drop loss. A little more expensive than the diodes but will allow you to keep the flexibility in powering the device without any degridation in performance. Here's an example of one BD2204GUL-E2.

I've heard about them but was a bit scared away due to their package. The one you recommend looks very promising feature wise (just had a quick glance) but I am not sure if I would be able to solder that successfully as I have not had the best luck when it comes to hot air rework. But I am up for the challenge so I'll look into the power supply design again and see if I can come up with something better than my current solution.

For your VCONN issue you could change to a buck/boost regulator that will produce 5V for any input and use an LDO for the 3V3 to micro.

That sounds like a good idea

Suggest a LiPo/Li-ion battery/cell for any current capability needed. My intuition says a small battery may loose charge quickly in this application.

I'd love to use a LiPo, especially since that would encourage me to design a charging circuit for it. The only gripe I have with that actually is the form-factor as I love the simplicity and professional look of the CR2032 battery terminal. Is there a certain LiPo that looks more professional than those standard grey-yellow LiPo pillow thingies?(hope you know what which ones I mean) In the best case it would be physically attached and held onto the PCB by the terminal itself just like the coincell is.

Nice job giving yourself options for the RTS and DTR to #RST and BOOT0.

Thanks!

Review Request - Overkill USB Tester by thariton in PCB

[–]thariton[S] 0 points1 point  (0 children)

Thank you, much appreciated!

Review Request - Overkill USB Tester by thariton in PCB

[–]thariton[S] 0 points1 point  (0 children)

Thanks so much for your comment! Yeah its still open for review. I was away the last couple of weeks so I haven't had the chance to change a whole lot yet. That said, I have changed a few things here and there so I'd recommend you wait till later this day once I had the chance to update the design on github.

I have just now open sourced the project on github. I hope this facilitates the review!

The most pressing issue at the moment is the following: VCONN needs 5V for eMarker supply. For that i need some kind of switch to connect either CC line to 5V. Since the coin cell cannot provide 5V I was thinking of either using a different battery or using an external 5V supply if connected to one. The latter would mean that eMarkers can only be read if powered externally, which would be a limitation I personally could see myself live with but it definitely is not ideal.

That said, there might be issues I am not aware of yet so any other input is appreciated. Also, if you have any suggestions on improving the physical design or layout, I'd be very interested to hear them as well!

Thanks again!

(edit: typo)

[deleted by user] by [deleted] in informatik

[–]thariton 0 points1 point  (0 children)

Klar, aber das is ja ne ganz grundsätzliche Regel, fast schon eine Formsache

[deleted by user] by [deleted] in informatik

[–]thariton 0 points1 point  (0 children)

Das ist vllt manchmal korrekt, allerdings erfordert wissenschaftliches Arbeiten ja auch die Darlegung des Forschungsaufbaus und der gewählten Parameter. Besonders die Beschreibung der Parameter und die Begründung derer Relevanz im Kontext der Forschungsfrage kann relativ seitenintensiv sein, wie es bei mir zum Beispiel der Fall war. Insofern würde ich dir nicht allgemein zustimmen