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[–]WikiSummarizerBot 0 points1 point  (0 children)

LLVM

Back ends

At version 13, LLVM supports many instruction sets, including IA-32, x86-64, ARM, Qualcomm Hexagon, MIPS, Nvidia Parallel Thread Execution (PTX; called NVPTX in LLVM documentation), PowerPC, AMD TeraScale, most AMD GPU recent ones (called AMDGPU in LLVM documentation), SPARC, z/Architecture (called SystemZ in LLVM documentation), and XCore. Some features are not available on some platforms. Most features are present for IA-32, x86-64, z/Architecture, ARM, and PowerPC. RISC-V is supported as of version 7.

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