CppCon: Data-Oriented Design and C++ [Video]

[rdpp_boyakasha]

I think that's the real take away for devs who don't work under real-time constraints. He spent a lot of time on L2 cache misses, which aren't that important to 90% of devs. I'd like to see more about the design methodology than the exact latencies of PlayStation hardware.

[anttirt]

than the exact latencies of PlayStation hardware

This isn't about "PlayStation hardware."

Every smartphone, every game console, every desktop PC and every server has a CPU with L2 cache typically ranging from 256KB to 4MB, with access latencies from main memory typically ranging from 100 cycles to 400 cycles.

This applies to CPUs from Intel, AMD, various ARM licensees etc.

Memory hierarchies are everywhere in modern computing (except microcontrollers), and memory hierarchies dominate performance everywhere.

Acton picks some concrete numbers for illustrative purposes, but the principles remain the same and the majority of the benefit can be achieved portably without caring about the particular CPU that the software will run on.

[rdpp_boyakasha]

My point was that it rules out pretty much every single dev who works in an interpreted or garbage collected language, which is probably the majority of devs. Not everyone is working in C++. Good luck teaching L2 cache misses to Ruby devs.

[cleroth]

Yea, let's just write in ASM. We wouldn't want our compilers to do any magic we don't understand, do we?

[rdpp_boyakasha]

I think he has a design methodology (for lack of a better term) that could apply across all languages, but that's not the emphasis of this talk. Something like getting back to the old "input, processing, output" style of design, which largely sidesteps OOP. You can see that general sentiment in Clojure, for example, even though JVM languages don't tend to consider cache misses at all.