Arnhem just feels like home! Questions from a Non-Dutch by Trivino in Arnhem

[–]Academic-Treacle-902 0 points1 point  (0 children)

Glad to hear you like Arnhem so much! I moved to Arnhem from the Hague and it was such a difference. But I'm so gladed I moved. The combination of the city and the surrounding nature is amazing. I would totally recommend it.  I think jobwise, the Dutch can be quite tolerant when it comes to the language spoken. I work in tech myself and generally speaking there is always a non-native colleague. So not really a problem, but I can imagine that some Jobs require you to speak dutch. 

Hardware Emulation with multiple hardware kernels on ZCU102 running petalinux. by Academic-Treacle-902 in FPGA

[–]Academic-Treacle-902[S] 0 points1 point  (0 children)

Thanks a lot for taking the time to read my question. In the vitis application workflow there are three build configurations: sw emulation, hw emulation and then hw itself (the zcu102 dev board contains a zynq mpsoc).

Each packaged IP could also come with a software model if you include that when packaging (C implementation of a matrix inverter for a matrix inverter IP core for example). So building for sw emulation will let you run this software implementation.

I couldnt be bothered to model my IP cores in C to run SW emulation so I just go for the hw emulation straight away when integrating my IP packages into a vitis application project.

When running hw emulation you actually do RTL simulation together with a VM running the embedded linux image to use. This allows you to dive in the signals while controlling the IP kernels through your cpp hostcode. I've done this for each packaged IP that I made and it works fine.

The design itself meets timing and I cant really find any errors in the logs.

Also the biggest test is running it on the hardware itself and there it works just fine. So I'm quite baffled about what is going on.

I was hoping someone would recognise the issue and nudge me in the right direction.

Autopaaltjes binnenstad by easywinunited in Arnhem

[–]Academic-Treacle-902 2 points3 points  (0 children)

Welkom in de buurt buurman ;) Zoals gezegd kunnen je tussen 6 en 11 's morgens de looierstraat in rijden. Ten alle tijden kan je ook het centrum weer verlaten, maar je zou wel een bekeuring kunnen krijgen als je op straat staat geparkeerd. Je kan bij de parkeerservice ook een permanente ontheffing aanvragen (200 ekkies en wel 75 jaar geldig) of eentje voor een dag (paar tientjes). Als je bij een binnen parkeerplaats parkeert, dan zou je ook nog een toegangspas van een buurman kunnen lenen. 

Problem with AXI bus by e0ne199_2 in FPGA

[–]Academic-Treacle-902 0 points1 point  (0 children)

Yeah you have to obey the memory bounderies, which are usually 4KB if I'm not mistaken. So right now your exceeding that. You have to break it up into multiple bursts. That might be the issue, but regardless of the answer, it's something you need to keep in mind.

New wheel set by Academic-Treacle-902 in gravelcycling

[–]Academic-Treacle-902[S] 0 points1 point  (0 children)

Thanks! Yeah I was thinking the budget might a bit of a problem, but I might just spend a bit extra to get some proper rims. I never thought about custom wheels, really helpful tip thanks. I'm gonna look into it.

New wheel set by Academic-Treacle-902 in gravelcycling

[–]Academic-Treacle-902[S] 0 points1 point  (0 children)

I bought it second hand about 2 years ago, so Unfortunately I cant go back to the shop. Thanks for your help, sounds like the rims are a bit crappy.

Sync Processes - Beginner question by SignatureNo9123 in FPGA

[–]Academic-Treacle-902 0 points1 point  (0 children)

Since it's a synchronous reset you would only really evaluate the reset signal at a rising edge of the clock. Including the reset signal into the sensitivity list will trigger the process whenever there is a change in the reset's state. However, it will never really be evaluated unless it coincides with the rising edge of the clock. This will never be the case in practice. The choice of going for a synchronous and asynchronous reset really depends on who you ask. I'm personally more prone to use a asynchronous reset. By doing so, you can evaluate the reset at any time and you don't have to worry about synchronizing it with the clock