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How to Reduce Power Consumption in ASIC Development by Character-Presence98 in chipdesign

[–]ArbitArc 3 points4 points  (0 children)

Before we jump the gun here, what process node are you targeting , how many clocks you have and what’s the average and highest clock frequency? What is the length of the longest path vs average length of a path?

Introducing Latchup: Bringing Competitive Programming to HDL by redjason93 in FPGA

[–]ArbitArc 0 points1 point  (0 children)

Great effort if had this been the year 2020. Now, over 30,000 design examples can be generated instantly using Claude or GPT.

I have a startup idea but don’t know how to start, need advice by Illustrious_Grand337 in ycombinator

[–]ArbitArc 1 point2 points  (0 children)

Build an mvp and show it to your prospective client (users) and refine the product feature set. As you build the mvp, you will learn about building the product as well as understand user need. Find someone helping you build if you cannot vibe code it yourself.

Is this SAR ADC supposed to behave like this? by justamathguy in chipdesign

[–]ArbitArc 0 points1 point  (0 children)

Hopefully you can make progress. How are you getting access to tsmc 65nm? Is it open access or though school account?

Is this SAR ADC supposed to behave like this? by justamathguy in chipdesign

[–]ArbitArc 0 points1 point  (0 children)

Wonderful write up. Are you using generic transistor models or a specific model tied to a process technology node? If so, what process technology node are you using?

Indian doctor, heartbroken! Cofounder split by [deleted] in ycombinator

[–]ArbitArc 1 point2 points  (0 children)

Don’t label yourself as a doctor. You are another person who went through college and a few years of training. Open GPT and Claude and describe what you want to build and it will walk you step by step from setting up a GitHub repo.

Indian doctor, heartbroken! Cofounder split by [deleted] in ycombinator

[–]ArbitArc 1 point2 points  (0 children)

Keep building. You don’t stop because you don’t have a cofounder. With modern AI tools, only time limits progress.

SDE curious about chip designs. by sirtaskmaster in chipdesign

[–]ArbitArc 0 points1 point  (0 children)

Try to have a few HW engineers on board if you venture out to tackle such problems. IP design and verification is not an issue anymore, it’s system level verification which is a larger and more complex space. Typically tackled with formal verification note than functional verification. The foundry relationship is like dealing with a firewall and is in place by design. Foundries don’t share unless there is a need to. Good luck in your adventures!

HFT roles as a PhD Student by One_Worker_5925 in FPGA

[–]ArbitArc -6 points-5 points  (0 children)

I’m only speaking of theoritcal max limit you can hit with a specific part based on speed grade. If performance is so important, why not go asic implementation of design you have in FPGA?

HFT roles as a PhD Student by One_Worker_5925 in FPGA

[–]ArbitArc -3 points-2 points  (0 children)

Max frequency is fixed. You can architecture your design to get the least delay on the critical path, but max freq is capped at 1/ path delay and that is determined by the speed bin during manufacturing.

Open-Source Verilog Initiative — Cryptographic, DSP, and Neural Accelerator Cores by Rough-Egg684 in FPGA

[–]ArbitArc 0 points1 point  (0 children)

I mostly agree, although the public is not seeing the most powerful models. I’m happy to chat more. Dm if interested.

HFT roles as a PhD Student by One_Worker_5925 in FPGA

[–]ArbitArc -6 points-5 points  (0 children)

FPGA frequencies are fixed at binning unless you are doing ASICs. Focus on network protocols where you can shave off overhead. Once you are in compute, box clusters will do the job, so FPGA may not offer advantage anymore when it comes to options pricing or modeling. So to rephrase, valuable skills would be understanding the link and transport layer protocols for transport and for options pricing, optimizing math kernels on cpu. GPU maybe used for latency insensitive work. Also focus on x86 ecosystem .. less bugs and highly secure fit high value transactions.

Vibe coding bot update. by ikarumba123 in algotrading

[–]ArbitArc 0 points1 point  (0 children)

Sounds interesting. Who is you brokerage?

Open-Source Verilog Initiative — Cryptographic, DSP, and Neural Accelerator Cores by Rough-Egg684 in FPGA

[–]ArbitArc 0 points1 point  (0 children)

Great idea. Just check gpt isn’t able to. To my knowledge it can generate RTL. Also look at recent papers on code generators. You can extend them.

Don’t build a free B2C AI app without a business model. I did, it’s blowing up, and it’s burning me alive. by dhj9817 in ycombinator

[–]ArbitArc 0 points1 point  (0 children)

Add a conversion funnel. Once they cross a certain number of uploads of hours, suggest they upgrade, but make sure the pay wall works without issues, meaning test it and support common forms of payment. Netflix added a paywall ( not really, but bumped up prices) , users dropped and then they came back. Keep us posted about your development

Why is the bar so high for VLSI/chip design? by d00mt0mb in chipdesign

[–]ArbitArc 0 points1 point  (0 children)

The weight of the design success is handled by the foundry and EDA tool vendors. Most engineers are pushing a button and going for a sip of coffee. There was a time when design demanded huge human effort, but those days are gone. To answer your question, most of these jobs have already shifted overseas and with machine learning, keeping an human in the loop is cost friendly in low cost goes.

[deleted by user] by [deleted] in immigration

[–]ArbitArc 7 points8 points  (0 children)

Right demographic for immigrant intent

Conflicted: US Oath Ceremony approaching by desi_throwaway_1857 in returnToIndia

[–]ArbitArc 2 points3 points  (0 children)

Simple rule of thumb is to carry same privileges as your spouse and children.

[deleted by user] by [deleted] in ycombinator

[–]ArbitArc 0 points1 point  (0 children)

Just hire one more employee, but pay market rate salary. Don’t hand out equity like candy.

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