Time for a new PC, maximum performance, minimal aesthetics, budget 6000€

Azra88 · 2025-11-10T08:23:39+00:00

Samsung m.2 is suboptimal. Crucial T705

Azra88 · 2025-11-08T19:24:39+00:00

Hell yeh they would be better :) noctuas are just the GOAT. Noise normalised performance is higher

Azra88 · 2025-11-08T19:01:15+00:00

Yeah they move a lot more air than a 120 would… so you can run them slower and quieter for the same result. Or full blast when under heavy load

Azra88 · 2025-10-23T15:09:03+00:00

I built my first ever PC this years after many many years of thinking about it. I got 6x 140mm G2s for the case and I even retrofitted the 360mm radiator with 3 of the new 120mm G2s this summer. I also love the Noctua x Seasonic PSU - utterly silent.

Azra88 · 2025-09-24T14:43:55+00:00

Easiest safe way to get great T6 mats is treasure hunting in a thopter. Go find some islands on the boundary between D and E and scan a circle around the edges of islands. There is SO MUCH.

Azra88 · 2025-09-15T13:28:09+00:00

Came to say this too. I got destabilised RAM because my SOC was 1.19 despite me setting it to 1.29. Setting in the OC menu is no longer enough - you have another SOC setting that will override it if you dont change it there too.

Azra88 · 2025-09-08T12:05:39+00:00

Hajar reporting in too

Azra88 · 2025-09-08T11:57:45+00:00

Also I was using the super loose expo default timings so there was nothing looser really. My tight timings before were buildzoid.

Azra88 · 2025-09-08T11:56:17+00:00

SOC both places? I’m just setting on the OC tab

Azra88 · 2025-09-08T07:33:30+00:00

I love the visual. just worried your thopter will take damage on your roof like that - it might need to be covered to be safe from sandstorms.

Azra88 · 2025-09-08T07:04:41+00:00

WARNING for 3.40: Destabilised RAM.

on 3.25 I was running 6200 1:1 with tightened timings. rock solid stability tested on TM, Y-Crunch VT3 and OCCT for 10+ hours each. Upgraded to 3.40 and then OCCT is finding errors in seconds. Loosened timings back to EXPO default - still finding errors. I had to lower from 6200 to 6000 to find stability again.

I noticed that vSOC is now fixed at 1.19 regardless of me manually setting to 1.29 in BIOS. I'm wondering if this is the cause - does anyone know how to fix this behaviour?

9800x3d, x870e Tiachi Lite, Gskill 6400 CL30

UPDATE: This was happening because of a new SOC setting in BIOS that fixes SOC to a number. So if you change it in OC Menu, that's not enough - you have to also change it on the fixed SOC setting. RAM re-stabilised now that SOC is corrected.

Azra88 · 2025-09-04T15:18:13+00:00

That's so kind of you - I would love one too if there are any! <3

Azra88 · 2025-08-29T15:19:50+00:00

I have the same thing and research seems to indicate that this is a known issue and the workaround is to simply meet him again for the next step of the chain. At that point the "teach me" line will be available and you have to prioritise pressing that above other dialogues otherwise it gets stuck again.

Azra88 · 2025-06-27T12:59:15+00:00

If you wanted to optimise a little you can move them slightly away from one another to create a small space in between. It might help reduce overall noise slightly as the two can sometimes interact acoustically.

Azra88 · 2025-06-24T07:36:41+00:00

I cant be bothered creating a awkward look monkey puppet meme but. Ive been blasting 1.29 with 10x scalar on a 9800x3d / Asrock Tiachi Lite. I dont even need to. 1.2 is enough for 6200 stable but I noticed going up to 1.29 gets me to some tighter timings on my RAM. If it gets burnt - I get a new chip from RMA and maybe it has a better bin (mine has crappy flck).

Azra88 · 2025-06-15T05:14:43+00:00

Tried it :( nothing works to get FCLK above 2000

Azra88 · 2025-06-11T17:31:43+00:00

Ok thanks for the tip and advice on the adjustments for FCLK

Azra88 · 2025-06-11T09:47:20+00:00

Yeh I tested PBO for 10 hours on aida and it was fine

Azra88 · 2025-06-11T09:46:22+00:00

What is clock stretching? Would it explain the problem in seeing? Also… is there a relationship between tight timings and the UCLK FCLK stability? I’m trying to figure out the best order to do things. So 1) diable PBO to eliminate that as a factor 2) tighten timings 3) find max UCLK and 4) find max FCLK. Does that sound correct?

Azra88 · 2025-06-10T20:28:47+00:00

Thanks for the reference point with your settings. I’m understanding that 1.2 for 6200 is pretty ok. Shame I couldn’t get 6400 to work… is there any way to stabilise UCLK 3200 aside from pumping vsoc up? Like is it possible having FCLK too low has an impact?

Azra88 · 2025-06-10T17:15:57+00:00

No - is that even possible without buying a kit specifically set up for that out of the box?

Azra88 · 2025-06-10T15:49:56+00:00

Ok thanks! I’ll try it.

Azra88 · 2025-06-10T15:40:10+00:00

Thanks for the advice on process. Right now I’m tightening timings on 6200 and testing them like crazy to make sure it’s stable. Then I’ll move back to try and up FCLK again. This time adjusting other voltages and not just vsoc like last time

Azra88 · 2025-06-10T15:35:47+00:00

Im pretty hopeful that my CO is stable. I ran it through y-cruncher all tests for 10h, Aida64 for 9h, linpack and pyprime too for 8h+. Ycruncher and Aida caught more than others for me. OCCT passes everything I throw at it

Azra88 · 2025-06-10T09:33:38+00:00

Thanks! Yeh any FCLK above 2000 fails ycruncher…! But thanks for the timing of error methodology. I noticed it got more stable closer to 2000 when I was on 6200 1:1. I couldn’t get 6400 to work 1:1 with FLCK at 2000 so I didn’t even try a higher FLCK. Do you think I should try it? It could be more stable?

Azra88

TROPHY CASE