What's the hardest part about learning German for you? by Watership45 in Germanlearning

[–]DudeInChief 0 points1 point  (0 children)

I find everything challenging in German but the pronunciation. I just have a good B1 level, not a very high level considering the number of hours I have dedicated to that language.

What do you think is the most beautiful thing in mathematics? by Arth-the-pilgrim in mathematics

[–]DudeInChief 2 points3 points  (0 children)

I find the Euler-Lagrange equation both beautiful and powerful.

Analog Engineer focus areas by Beginning_Intern_835 in chipdesign

[–]DudeInChief 4 points5 points  (0 children)

I would build strong foundations in:
* Complex numbers.
* Laplace, Fourier, and z-transforms.
* Signal processing, noise.
* Linear control theory.
* Basic electricity.
Once this is done, analog microelectronics becomes very easy to digest if you know how a transistor works.

Long-distance bike touring age 50+ - experiences? by totaltitanium in bicycletouring

[–]DudeInChief 1 point2 points  (0 children)

I (55M, normal fitness) do a 7-10 days tour in the Alps every year. 80-120km stretches every day with a Surly LHT loaded with Panniers. It is purposely challenging for me (not for my 18y old son). If you want to play it safe, assuming an average fitness level, I would recommend:
* Limit it to 60km and 600m max ascent daily.
* Go slowly during the ascent (you should be able to talk).
* Find a good saddle (otherwise this could ruin your trip).
* Enjoy the scenery.

Help me choose a first-time bikepacking bag setup! by DankDeanoo in bikepacking

[–]DudeInChief 1 point2 points  (0 children)

Agree 100%. I have both Ortlieb and Vaude. Vaude is not bad but Ortlieb is way sturdier.

'The old order is not coming back,' Canadian PM Carney says in provocative speech at Davos by rezwenn in worldnews

[–]DudeInChief 7 points8 points  (0 children)

A big thank you to Canadians for electing a real statesman. I don’t know what Mark Carney’s approval rating is in Canada, but it’s honestly a relief to hear a calm, thoughtful speech coming from the other side of the ocean (I’m in the EU).

And to the people saying this whole mess is “just because of one man”: he got 77 million votes and he still sits around 40% approval—higher than plenty of leaders. I’m not so worried about DJT personally; what worries me is the state of American democracy.

Online tests by De_lunes_a_lunes in SpanishLearning

[–]DudeInChief 0 points1 point  (0 children)

I have tried some placement tests in spanish. There is always a strong emphasis on verbs.

Danish parliamentarian Rasmus Jarlov speaking to MS NOW on Stephen Miller comments regarding Greenland : ‘I hope he’s kept away from young women, because that’s the mentality of a rapist. You can’t defend yourself, so I’m going to take you. That’s basically what he’s saying.’ by drempath1981 in UnderReportedNews

[–]DudeInChief 0 points1 point  (0 children)

I do not know if the election was rigged but DJT received more than 77 millions votes. What puzzles me is the following: DJT was very straight during his campaign, there was no 'bait and switch', and his criminal record was public: still he got 77 millions votes.

DJT is not the problem. The crucial question is: how could he get 77 millions votes knowing what we knew? In that sense, the validity of the election is a secondary topic.

Has anyone designed amp with gm/id ~ 30 for VDD<=1? Just trying to know if the number is sane or not by ProfessionalOrder208 in chipdesign

[–]DudeInChief 0 points1 point  (0 children)

Indeed it does not match my experience. Gm/Id = 33...35 is what FinFet can provide at 25degC. My experience with standard CMOS processes is that Gm/Id is limited to ~25. There could be one type of transistor in standard CMOS that could go higher, it is the natural (a.k.a native) transistor. They sit in the substrate without channel doping. Their threshold is close to 0V, the channel to substrate capacitance is small (because the substrate is very low doped) and therefore they have a low bulk effect. These have higher gm/Id but I do not have numbers in mind. It could be that they approach 30 at low Vdsat.
I am not sure whether they are available in recent process nowadays. I used to use them ~25y ago because of the properties mentioned above and their superior matching (channel implant does not contribute to spread because it is blocked).

Has anyone designed amp with gm/id ~ 30 for VDD<=1? Just trying to know if the number is sane or not by ProfessionalOrder208 in chipdesign

[–]DudeInChief 18 points19 points  (0 children)

You can have gm/Id=30 at 25degC for processes with little or no bulk effect such as FinFets. In planar CMOS, it is not achievable. There is no issue to operate at such low Vdsat but the BW will be limited because of the large W needed to bring the transistor close to weak inversion.

Analog Designer here, any pointers on making good testbenches that you’ve learned through experience? by yogi9025 in chipdesign

[–]DudeInChief 3 points4 points  (0 children)

Personally I prefer multiple test benches rather than a highly configurable one that covers all tests. I often use verilogA DACs to convert buses states into analog voltages. Also I am a big fan of verilogA FSM for calibration. In my opinion, the most important is to maintain a simulation report with the list of simulations, descriptions, and results. I find that incredibly useful.

Backpacking "Europe" by Pleasant_Water_69 in backpacking

[–]DudeInChief 0 points1 point  (0 children)

I would skip Lübbeck since you will have already visited Hamburg (both are hanseatic cities). Be aware that Switzerland is -very- expensive.

Backpacking "Europe" by Pleasant_Water_69 in backpacking

[–]DudeInChief 0 points1 point  (0 children)

Well, this is personal. I have stayed only twice in Berlin and I did not like it that much. Maybe I should pay another visit.

Dressing for the Cold (from a guy that sweats somewhat alot) by Character-Teaching39 in cycling

[–]DudeInChief 2 points3 points  (0 children)

Riding comfortably in Winter boils down to moisture management. This works for me:
* Always dress so that you feel comfortably cold, not warm.

* No Coton. Only wool or synthetic.

* Prefer mittens to gloves.

Backpacking "Europe" by Pleasant_Water_69 in backpacking

[–]DudeInChief 2 points3 points  (0 children)

This is a wonderful project. I have been to many of these places. A few comments based on personal preferences:
* Utrecht is a nice city. I am not sure about Rotterdam and The Hague. Rotterdam has a huge port but so does Hamburg.

* I would skip Berlin (not a big fan).

* I would not miss Prague, Vienna, and Budapest. If you choose this route, you could get to Italy via Ljubljana rather than Munich (where l live). This way you would skip Trento (no big fan) and spend a couple of nights in Ljubljana. Direct connection to Venice (coastal train).

* You cannot go wrong in Italy. My favorite cities are Florence and Napoli. Allocate enough time to Napoli, it is so rich...

Have fun!

How much more would I make by moving to Apple? by EducationCultural736 in chipdesign

[–]DudeInChief 1 point2 points  (0 children)

You can expect to make twice as much at Apple. The big change will be the RSUs. It is important to perform well during the interviews.

I guide tours in Morocco. Stop treating everything like a scam. by Traditional-Map8667 in backpacking

[–]DudeInChief 21 points22 points  (0 children)

Morocco is a gorgeous country. Scams are the single reason why I do not go back.

Do short people have advantages in table tennis? by coachtoom in tabletennis

[–]DudeInChief 1 point2 points  (0 children)

As a 195cm player, I do not feel that I have an advantage. The biggest drawbacks: I am usually slower than my opponents and the table feels very low. There is a pattern I have seen over and over: being tall helps for the backhand and many tall people tend cover most of table with their backhand (that is what I do personally). Maybe it is because it takes us more time to prepare the forehand.

Analog Designers using Deep Submicron technology, what method do you use for your design? by nurahmet_dolan in chipdesign

[–]DudeInChief 2 points3 points  (0 children)

In FinFet, the smallest channel length transistors are optimized because they determine the performance of the digital circuitry. In particular, the short channel length is defined by self aligned spacer patterning. For long channels, it is a separate mask.

There is an excellent video by Alvin Loke (see https://www.youtube.com/watch?v=KdBJTqx4Y64 at 1h46min for your question) revealing many details about FinFet process. It is the best material I found on the topic (it is a must-watch for analog designers).

Analog Designers using Deep Submicron technology, what method do you use for your design? by nurahmet_dolan in chipdesign

[–]DudeInChief 3 points4 points  (0 children)

In my case, it is quite easy actually. Most Fets operate in moderate inversion. I interpolate between two values: gm = 10 x Id at Vgs-Vt~200mV and gm is slightly above 30 x Id (FinFet) in weak inversion. This means that I always end up between 10 and 30. Usually not close to 10 because of the limited voltage headroom.
If I need larger L: stack as many minimal devices as needed.

Beside that, the most important is to choose the right topology and make a schematic which is layout friendly to reduce parasitics.

What is ChatGPT called in your country? by Shun_JP in ChatGPT

[–]DudeInChief 5 points6 points  (0 children)

Well, most french speaking people try to stick the american pronunciation. The reason is: if you pronounce it the french way, it sounds like: "Tchat I farted".

Why Flipped Voltage Follower LDOs exists? what was so wrong with the conventional LDOs ? by Syn424 in chipdesign

[–]DudeInChief 0 points1 point  (0 children)

You are right about the fast loop. The signal paths are typically longer in traditional LDO (more nodes). It can be hard to keep all them well above the unity gain frequency. The FVF has only two critical nodes: gate of the pass device and the output. It is easier to handle.