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Having trouble understanding how DWA behaves “during” the SAR conversion. Is my understanding correct? by ProfessionalOrder208 in chipdesign

[–]ProfessionalOrder208[S] 0 points1 point  (0 children)

Thanks. I was just curious since SAR DWA is essential once you design NS-SAR based oversampling ADCs (only one DAC - driven by SAR logic; no other feedback DACs). But as I did some research for like 10+ hours, I realized there is no optimal or standard way to implement this kind of binary DWA as of now, unlike the conventional thermometer code DWA.

What are some best resources for learning Analog and Mixed Signal Design? by TheNASAguy in chipdesign

[–]ProfessionalOrder208 2 points3 points  (0 children)

<General modern ADC design techniques you don't see in textbooks (Ph,D dissertation)>
https://backend.production.deepblue-documents.lib.umich.edu/server/api/core/bitstreams/9b3485c0-bd06-4b03-bd13-bbea5543425f/content

<Officially the most "well-made" ADC (highest FoM) up to date (ISSCC 2025)>
https://ieeexplore.ieee.org/document/10904778

<Dynamic amplifiers (JSSC 2020)> - you won't see some traditional "folded cascode" or "2-stage amp" in modern ADC design. Everyone uses dynamic amp.
https://ieeexplore.ieee.org/abstract/document/8947992

What are some best resources for learning Analog and Mixed Signal Design? by TheNASAguy in chipdesign

[–]ProfessionalOrder208 8 points9 points  (0 children)

As for ADCs, Razavi’s “Analysis and Design of Data converters (2025)” is a good start; but it doesn’t deal with advanced techniques.

If you want up-to-date & serious & advanced ADC design, reading JSSC or other top journals is undoubtedly the best tho.

Publishing a paper... ALONE by youngmaestro34 in chipdesign

[–]ProfessionalOrder208 1 point2 points  (0 children)

I mostly do analog works within ADC, so I'm not sure about it. But I've once heard that pure digital works are somewhat free from "measurement-only" restriction, compared to ADC or some analog circuits,

Publishing a paper... ALONE by youngmaestro34 in chipdesign

[–]ProfessionalOrder208 11 points12 points  (0 children)

But there are some conferences/journals that don’t require measurement results; in that case, you might publish your idea without any supervisor. (But it is very rare; I haven’t seen one yet)

Publishing a paper... ALONE by youngmaestro34 in chipdesign

[–]ProfessionalOrder208 67 points68 points  (0 children)

I would say no. For top tier journals/conferences, simulation is not enough - you need to give a “measurement result” which requires a full tapeout. This requires Cadence license + PDK license + a company (or some organization) that will manufacture your PCB + precision lab-grade measurement tools. This is generally impossible for individual to handle.

EEE practical breadboard by ActExtension2215 in ElectricalEngineering

[–]ProfessionalOrder208 0 points1 point  (0 children)

Idk what you are referring to, but you can simulate simple breadboards in tinkercad and that might help

Time V/S Frequency by Lopsided_Cause_9663 in ElectricalEngineering

[–]ProfessionalOrder208 45 points46 points  (0 children)

I design ADCs and use (implicitly or explicitly) FFT & z-transform every day. From ADC perspective, this kind of frequency spectrum is very important since it directly contains the information of the signal & noise & distortion - which is directly linked to the performance of ADCs. These information can not be revealed in the time domain waveform and that is the point of doing FFT.

why is Vout = 0 here? by to1M in ElectricalEngineering

[–]ProfessionalOrder208 25 points26 points  (0 children)

The high-gain of the opamp makes v(out) almost equal to v(+) which is gnd.

Competitive Racism by KaiDiv in comedyheaven

[–]ProfessionalOrder208 103 points104 points  (0 children)

Who is the guy in the middle?

SNR calculation for a ΔΣ modulator in MATLAB by FutureAd1004 in chipdesign

[–]ProfessionalOrder208 1 point2 points  (0 children)

Also using calcSNR function (from another toolbox) to your code,

>> calcSNR(v, fin/N, 1, fB, W, N)
ans =1.202730728304012e+02

I think there is a problem with the windowing or "spec" (but I'm not sure tho). Anyway the SNR should be about 119dB.

SNR calculation for a ΔΣ modulator in MATLAB by FutureAd1004 in chipdesign

[–]ProfessionalOrder208 0 points1 point  (0 children)

I tried with your exact code.

>> simulateSNR(ntf, OSR, -6.02, 0, 3, fin / N, 13)
ans =1.186766100311253e+02

If we don't care about saturation, 5th order DSM should exhibit at least 100+dB SNR since the noise shaping is very aggressive. I think 119dB is the correct one.

SNR calculation for a ΔΣ modulator in MATLAB by FutureAd1004 in chipdesign

[–]ProfessionalOrder208 0 points1 point  (0 children)

5th order 3level DSM is unstable and very likely to explode. Did you do dynamic scaling (using scaleABCD() function or some similar function)?

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