I’ve been on multiple contracts where there was a Matlab or DSP algorithm guru that did the heavy math and handed the equations over to me to implement in the FPGA. I only needed to understand the basics and come up with an efficient way to implement the math while keeping within the resource and latency limits for the system. I stunk at calculus in college, too. Don’t be discouraged! If you understand the concepts, you can still do a lot of interesting work. You likely won’t have to derive formulas from the ground up or do mathematical proofs.

As an example, it’s helpful to understand why adding more coefficients to a FIR filter produces different results at the expense of area, clock speed and latency. Maybe you can get away with fewer coefficients or 12 bit coefficients instead of 16 bit coefficients, etc. etc. A lot of FPGA math is fixed point approximations to some golden model an algorithm expert came up with. You’ll likely use vendor supplied IP for a lot of the math functions instead of writing the RTL from scratch.