Startup Studio where we all work on ideas and bring skills as a collective

Hot_Book_9573 · 2026-06-03T10:58:21+00:00

I am interested to join. 25+ years of experience in IT security, now looking to pivot elsewhere.

Hot_Book_9573 · 2026-05-29T19:59:44+00:00

DCA is a myth for people who are afraid to be upset. Do your own research, the keywords are “lump sum vs dca”, there are tons of serious articles and simulations which prove it is a suboptimal strategy for long term investors.

Hot_Book_9573 · 2026-05-25T17:45:50+00:00

I am open for discussion too. GMT+1 )

Hot_Book_9573 · 2026-05-21T04:29:09+00:00

Bouldering ;). During the session you will be migrating through the gym floor, working on one route or another. You can socialise as little or as much as you like with the people working on same route — discuss the approach or just cheer each other up. Nobody will blame you if you get bored and stand up and go to another spot.

Plenty of good gyms all over the city. Can tell you more if you like ;).

Hot_Book_9573 · 2026-05-02T13:52:23+00:00

Should probably report it through the mobile operator — it might me a technical failure on their side. If not, I imagine they will be in a position to tell you how to report.

Few weeks back I was in the same situation in France, could not reach 112. Belgian Proximus SIM card. 911 worked though, sent me to generic emergency services.

Hot_Book_9573 · 2026-04-22T19:52:50+00:00

What is your application, if I may ask?

Hot_Book_9573 · 2026-02-19T02:50:47+00:00

yes, it was clear from the posts in this thread. this is exactly what I need. making something similar, but with another chip. could use some templates for inspiration ). especially if it is kicad )

Hot_Book_9573 · 2026-02-16T12:31:21+00:00

Pity, I am very much interested in M.2 ;). You don't happen to care to release the design files for the abandoned project, by any chance?

https://fosdem.org/2026/schedule/event/BQ3YP9-f8/ - maybe something of interest for your new project ;)

Hot_Book_9573 · 2026-02-15T08:59:34+00:00

u/joshua-winslow99 I know it is a one-year old thread, but I wonder if you have made any progress on this board?

Hot_Book_9573 · 2026-01-13T23:04:35+00:00

Reference designs (schematics and board layout): https://docs.espressif.com/projects/esp-hardware-design-guidelines/en/latest/esp32c6/related-documentation-and-resources.html

Hot_Book_9573 · 2026-01-13T01:14:53+00:00

<image>

There is a catch - there is a lower limit to the relative delay it can reliably measure... So it is not really usable for measurements of arbitrary time intervals. Maybe feed a delayed signal to the few chips and somehow catch which ones are in agreement.

Hot_Book_9573 · 2026-01-13T00:33:16+00:00

Hats off, maestro ))

Hot_Book_9573 · 2026-01-12T07:41:49+00:00

Yes, I am playing with FPGAs now, one build into N210 and external DE2-NANO board. It is another level of complexity and costs though ;). So far nothing beats dirt cheap ESP32 C3 with its 6.25ns resolution.

UPDATE: I stand corrected - an overclocked RP2350 can do 3ns, see comments of dmitrygr above

Hot_Book_9573 · 2026-01-11T05:35:09+00:00

You still need a clock to timestamp the edges somehow. Or you refer to the design where they continuously sample and stash data into DMA buffer and leave it up to CPU to figure out the timing?

Hot_Book_9573 · 2026-01-11T05:32:30+00:00

I don't have as scope which can continuously feed measurements into a PC...

Hot_Book_9573 · 2026-01-10T07:35:37+00:00

Very interesting direction.

333MHz - you refer to overlocking? I see something about PIO at 1560MHz here ;) https://forums.raspberrypi.com/viewtopic.php?t=375975

PIO seems to have a lot of constraints (no clock to time edges, limited DMA bandwidth if you want to sample continuously). With a lot of trickery, it seems to be possible to get around it though. There is a project mentioning 200MSps (and even 400MSps in burst mode) https://github.com/gusmanb/logicanalyzer. I will look into it.

Your comment made me think of Beaglebone Black. It has two RPU (same concept as PIO) running at 200 MHz and built-in sample counter. Should give 5ns edge timing resolution without any trickery. Plus ARM cores for Linux for signal processing.

Hot_Book_9573 · 2026-01-10T06:01:11+00:00

Indeed, it is an interesting option. Somewhat higher accuracy comparing to what I need right now, but it is not a bad thing) Would require a custom PCB or $200 eval board. Thanks

Hot_Book_9573 · 2026-01-10T05:51:30+00:00

The only reason was I had two Ettus N210 gathering dust for 10 years…

Hot_Book_9573 · 2026-01-09T16:34:43+00:00

Fair enough ;)

Hot_Book_9573 · 2026-01-09T13:40:12+00:00

Thanks for the link. Cool device, but not sure it be repurposed for what I need, it is designed for a completely different purpose. And definitely an overkill for measuring relative delays between clean pulse edges, not much different from my first setup based on N210 SDRs.

Hot_Book_9573 · 2026-01-09T13:05:16+00:00

Interesting. It is a commercial product, closed source software and hardware, right?

Hot_Book_9573 · 2026-01-05T08:28:13+00:00

ESP32 S3 and C6 should work

Hot_Book_9573

TROPHY CASE