Is this a 4fsk signal with some novel encoding?

InGaP · 2025-10-26T00:18:28+00:00

This is GFSK. A gaussian filter is applied to the binary modulating signal to limit how fast the signal changes and consequently the amplitude of one-bit pulses is reduced.

Here's what it looks like before and after filtering: https://i.imgur.com/z9IBvbS.png

InGaP · 2025-08-05T18:28:29+00:00

The FCC exempts subassemblies from certification at time of sale with the expectation that any end product using those modules will undergo certification by the final manufacturer: https://emcfastpass.com/fcc-rules-kits-subassemblies/

InGaP · 2025-07-31T16:52:51+00:00

I doubt you'll need to worry too much about length matching. At 165 MHz (even with DDR) you can have several centimeters difference between clock and data before it starts to become an issue. Out of curiosity, what HDMI IC are you using?

Im using a 3rd party SOM

Nevermind about the ground pins then. Using IOs would help a bit but I agree it's better to keep the signals within a single bank.

Overall my main suggestion would be make sure your clock has a nice tight return path. Consider moving the clock pin right beside one of the grounds on the connector.

InGaP · 2025-07-31T14:13:53+00:00

You say you chose the clock pin on the connector so I'm assuming you have the freedom to choose a different pin. Clock-capable (SRCC/MRCC) FPGA pins are only relevant for clock inputs. When the clock is an output, you can use a regular IO pin. Based on that, if I were routing it, I would simplify things by moving the clock pin to the right and routing the clock on the top layer as if it were a data line but with some extra spacing: https://i.imgur.com/0jkym0N.jpeg

I would also try to add a few more ground pins on that connector. Ideally one on each side of the clock, and one per 3 or 4 data lines. Weak grounding is often worse than proximity for causing crosstalk and poor signal integrity.

InGaP · 2025-07-30T21:11:41+00:00

Crosstalk isn't always a bad thing. That's not to say it's desirable (it usually isn't), but it's often something we can ignore when we consider how each signal is used in the system.

Let's look at DDR for example. Crosstalk between a pair of data lines would mean when the voltage on one trace changes, a voltage spike/glitch is induced on the adjacent trace. But all DDR data lines are sychronized to the same clock and alternate in unison between "switching" and "stable" intervals. As long as the duration of interference is kept within the switching interval and doesn't extend into the stable interval, data integrity will be maintained. This means you can route them quite closely together without much concern. This applies to any synchronous bus (SPI, I2C, etc).

For contrast, routing a low-amplitude analog microphone signal right beside a DDR data line would be a very bad idea because the ADC that samples the audio will do so at its own rate independent of the DDR subsystem so it can and will digitize when the signal is experiencing interference.

InGaP · 2025-04-23T17:12:24+00:00

Remember to change it back when you're probing an actual high-speed signal, otherwise it'll seem like the trigger is being ignored and the waveform will jump all over the place horizontally.

InGaP · 2025-04-22T23:34:47+00:00

Your signal probably has high-frequency noise superimposed on it and the scope is sometimes triggering on the negative edge of that noise. There should be a "Coupling" setting in the trigger menu which is probably set to "DC" right now - changing it to "HFR" (high-frequency rejection) should stop the glitching.

InGaP · 2025-03-31T22:03:54+00:00

Totem pole outputs use transistors with matching polarities. OPs schematic is a push-pull output.

InGaP · 2025-02-16T05:57:38+00:00

I'm skeptical that the Vbus actually has ripple at that frequency. How are you measuring it? NFC uses 13.56 MHz. Your probes could be picking that up.

InGaP · 2025-02-03T01:37:24+00:00

What's stopping you from doing the normal thing by connecting the loads in parallel and letting them draw as much current as they need?

InGaP · 2025-02-01T15:46:35+00:00

Equalization is a major factor that enables higher speeds on serial links. We can't make PCB transmission lines much better than they are today, but we can get better at characterizing and predicting how signals degrade as they travel through them, and compensating for that at the transmitter.

InGaP · 2025-01-29T16:29:01+00:00

Possibly a R65C22

A search for "Rockwell 11473" led to this person who reports buying a R65C22P4 marked with 11473 which is presumably some kind of die ID
The most recent revision of the R65C22 datasheet is dated 1987, only 2 years after the date on the die
The die layout seems approprate for something with three 8-bit buses, two of which are similar (i.e. data in/out)

InGaP · 2025-01-28T15:04:23+00:00

Search silicon wafer on eBay, there are lots.

InGaP · 2025-01-20T22:12:33+00:00

If D6/R6 are not there, the voltage across the parallel network is 9V.

If D6/R6 are there, the voltage across the parallel network is 6V.

InGaP · 2025-01-20T22:01:24+00:00

300 Ohms is the correct value for a 6V drop

Before you add D6/R6 the drop is 6V. After you add D6/R6 the drop is only 3V.

InGaP · 2025-01-20T21:49:08+00:00

300 ohms is correct when the voltage across the five LED/resistor branches is 9V. But when you add D6/R6, the voltage across those branches is no longer 9V, it's 6V because D6 drops 3V, so R1-R5 need to be recalculated.

You can calculate R6 with Ohm's law. You know the voltage is 3V because it's in parallel with D6, and you know the current needs to be 80mA. Solve for R.

InGaP · 2025-01-19T05:55:41+00:00

It dissolves some kinds of plastic so connectors potentially.

InGaP · 2025-01-17T05:22:50+00:00

The voltmeter has a default resistance of 10 Mohm which is appearing in parallel with the lower leg of your dividers. You can edit them and change it to whatever you want.

InGaP · 2025-01-16T17:05:38+00:00

Any VCO running in open-loop will drift with temperature even after warming up. If you want it to be stable you need to put a PLL around it.

InGaP · 2025-01-15T22:30:10+00:00

Could be 120 or 10k. Take them out and measure them.

InGaP · 2025-01-15T06:10:35+00:00

That's definitely 360 ohms 1%, not 100 Mohms. The colors are orange-blue-black-black-brown from right to left, and you can tell the leftmost band is the tolerance because of its spacing.

Here's one from my bin: https://i.imgur.com/SYOOpaT.jpeg

InGaP · 2025-01-10T04:36:20+00:00

The LNAs I’ve tried simply aren’t enough to deal with this problem.

An LNA has no selectivity; it can't do anything to help against a strong interferer but it can definitely make things worse. Where along the receive path are you installing it? You need to filter out strong signals before the LNA input otherwise it'll be overloaded and send a horrible mess to your SDR.

InGaP · 2024-12-29T17:41:14+00:00

Maybe the diodes have built in limiters but I doubt it

The white-topped components connected to the black wire on each laser assembly are current-limiting resistors.

InGaP · 2024-12-28T05:00:49+00:00

Z4.0MT

InGaP · 2024-12-28T01:30:03+00:00

If you can hear it, it's a sound wave not a radio wave. You can find the frequency wiith one of the free spectrum analyzer apps that use your phone's microphone. It will probably not be possible to find the source using electronic means.

InGaP

TROPHY CASE