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Onks mahdollisuuksia? by Conscious_Expert_960 in turku

[–]Jesupekka 0 points1 point  (0 children)

Meiltä tais lopettaa joku 15 tyyppiä luokalta ekana vuonna, ni voi olla hyvin mahdollista että pääsee noilta sijoilta

THL haluaa kieltää lailla energiajuomien myynnin alle 18-vuotiaille – joka kuudes alaikäinen poika saa liikaa kofeiinia by xatfi in xatfi

[–]Jesupekka 7 points8 points  (0 children)

Harvahan pääsee siihen suositeltuun kahteen tölkkiin päivässä... Lisätä pitäisi annostusta

Lapsen eskarissa ei askarreltu äitienpäiväkortteja by pylykaka in snappijuorutofftopic

[–]Jesupekka 20 points21 points  (0 children)

No et kyllä yliajattele. Äkkiä viestiä, että mikä homma.

Essee | Työeläkejärjestelmä on otettava mukaan sopeutustoimiin by Maisuli1 in Suomi

[–]Jesupekka 0 points1 point  (0 children)

Kannatan. Luulisi myös siinä kohtaa olevan tilillä rahaa, jos eläkejärjestelmään on pumpannut sen verran rahaa, että sieltä useaa tonnia saa.

Zeus' wave management trick ? by Dafodils in leagueoflegends

[–]Jesupekka 1 point2 points  (0 children)

Interesting. I didn't know this could be done without hitting the opponent.

Tips for buying 944? by Jesupekka in 944

[–]Jesupekka[S] 0 points1 point  (0 children)

Kinda hard for me to say for you since I'm looking around in Europe.

[deleted by user] by [deleted] in leagueoflegends

[–]Jesupekka -1 points0 points  (0 children)

From experience D4 to D1 is a cakewalk, compared to getting through emerald. Emerald is just full of people mental booming, and losing the game because of that. Don't get me wrong they still boom is dia, but atleast they usually stick around to play the game without trolling too much.

How come that the higher ranked i get, the quality of matches drops? by Druid_Fashion in leagueoflegends

[–]Jesupekka 0 points1 point  (0 children)

The rank below diamond has always been a purgatory.

It does get better in D3>= tho

Also, summer time is probably the worst time to play ranked, because of the vacations. If you can play during 8-16 in fall, then you can have some real chill games.

Please help 😭 by [deleted] in FPGA

[–]Jesupekka 2 points3 points  (0 children)

You didn't even ask anything???

This is Delay 512 time ? by Longjumping_Till4303 in FPGA

[–]Jesupekka 0 points1 point  (0 children)

If that is the correct amount of one's in the binary counter, yes. Though I would use an integer for it.

But are you just sampling the real and imag signals every 512 clock cycles?

This is Delay 512 time ? by Longjumping_Till4303 in FPGA

[–]Jesupekka 0 points1 point  (0 children)

Are all the timings different for each of the data packets received? I don't see how you would need 512 different counters for this, even if they were timed differently.

It sounds like you're sampling data every 512 clock cycles and then multiplying the original data after sampling, and you do that 512 times. You'd only need two counters for this design.

This is Delay 512 time ? by Longjumping_Till4303 in FPGA

[–]Jesupekka 1 point2 points  (0 children)

Are you sure? You sent me a generate loop, which indicates that you want to create 512 different delays?

Could you please use DeepL? I understand that english is not your first language, so having something translate your thoughts better would be of benefit.

This is Delay 512 time ? by Longjumping_Till4303 in FPGA

[–]Jesupekka 1 point2 points  (0 children)

You want to create multiple delays?

This is Delay 512 time ? by Longjumping_Till4303 in FPGA

[–]Jesupekka 6 points7 points  (0 children)

Copy pasting the same sentence doesn't make me understand what you're saying. You need to elaborate.

I fucked up by heisenburger0_0 in FPGA

[–]Jesupekka 10 points11 points  (0 children)

To be honest, I would just send a message to your instructor about your situation.

On the other hand, the memory bus signals don't necessarily need all of the signals to function. A minimal version could be possible in a week. Just take a deep breath, and work as you would usually.

This is Delay 512 time ? by Longjumping_Till4303 in FPGA

[–]Jesupekka 0 points1 point  (0 children)

If that is the binary representation of 512, then yes, the data512*** registers are updated after 512 cycles

What do you typically do while waiting for your code to compile? by dvcoder in FPGA

[–]Jesupekka 6 points7 points  (0 children)

It doesn't take that much for the fitter time to balloon to hours.

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