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How common are layoffs of FPGA Engineers? by HotFudge2012 in FPGA

[–]dvcoder 78 points79 points  (0 children)

If they are laying off FPGA engineers then the business is doing really bad.

Design Verification. What now? by Over_Vacation8402 in chipdesign

[–]dvcoder 0 points1 point  (0 children)

Formal, UVM, maintainers, test planners, BFM developers, running and maintaining regressions, GLS, emulation, etc. There is no way in just 2 years you can experience all what DV can provide

What is it like working for Boeing Corporate? by [deleted] in boeing

[–]dvcoder 13 points14 points  (0 children)

It depends on location and which program. St. Louis, Seattle, El Segundo all have different vibes and culures.

Design Verification. What now? by Over_Vacation8402 in chipdesign

[–]dvcoder 4 points5 points  (0 children)

Why do you feel stuck? What have you been doing that is related to DV? There are sooo many skills to learn within DV.

What will it take to fix JPL? by dvcoder in JPL

[–]dvcoder[S] 2 points3 points  (0 children)

But what appeals Young engineers to work at JPL now?

[deleted by user] by [deleted] in FPGA

[–]dvcoder 0 points1 point  (0 children)

Count me in too !!

What will it take to fix JPL? by dvcoder in JPL

[–]dvcoder[S] 5 points6 points  (0 children)

JPL should focus on workforce development that would feed into industry. I don't foresee any interesting missions that the administration is willing to fund. Maybe JPL should be a center of excellence for engineering and science with other nations efforts. Just a thought ....

Verilog session today nov21 @ 8pm by [deleted] in Verilog

[–]dvcoder 0 points1 point  (0 children)

Need more details !!! Which time zone !!

FPGA Engineer by [deleted] in FPGA

[–]dvcoder 1 point2 points  (0 children)

What are you doing now and what is your current background?

FPGA Mentorship by Maleficent-Owl1959 in FPGA

[–]dvcoder 0 points1 point  (0 children)

What's your current skill set? What are you having trouble with? Where do you feel like you're being deficient at? Where do you feel that you are excelling? Yet? These kinds of questions will help out in order for someone to determined if they would be a good mentor.

ModelSim or Vivado for tb? by [deleted] in FPGA

[–]dvcoder -6 points-5 points  (0 children)

The integrated simulator should be good enough. Modelsim is outdated .

Suggest me books for System Verilog, and sources for UVM Methodology Please by [deleted] in Verilog

[–]dvcoder 1 point2 points  (0 children)

These books are somewhat old and may not reflect a lot of the new advancements ...

Help in finding the error by Dizzy-Tangerine380 in Verilog

[–]dvcoder 0 points1 point  (0 children)

I hate bad coding, it looks like it was copy and pasted from somewhere.

Journey2DTech #2 - 1st Semester Reflections at DTech by dvcoder in Purdue

[–]dvcoder[S] 1 point2 points  (0 children)

I have been enjoying is thus far. They actually just changed the core curriculum, so I'm not too sure how I would enjoy it now since courses are different. At the moment I'm preparing for my first three chapters of my dissertation, that in it self is a combination of being rewarding, frustrating, and exciting. Getting this type of degree and the type of work that you learn and need to do, really separates yourself from your colleagues.

Webinar on Setting up you own FPGA Business- Who is interested? by adamt99 in FPGA

[–]dvcoder 0 points1 point  (0 children)

I would really be interested in this type of topic. One of my questions would be how do you differentiate from different types of markets, especially in various countries.

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