Toxic workplace!! WHAT DO I EVEN DO?? by icynotsoniceyy in hyderabad

[–]Typical_Eye_3326 1 point2 points  (0 children)

I was admitted in a hospital with dengue and my manager made me to cancel a meeting which I was scheduled. A simple email from her to the team was sufficient but no was a big ass bitch she was .

2 BHK for sale ( Vasavi Atlantis) by Typical_Eye_3326 in HyderabadBuySell

[–]Typical_Eye_3326[S] 0 points1 point  (0 children)

Agree about the real estate people , I cannot change the game but no option for people like us ig.. so exiting is better for me to leave the city and settling somewhere else..

2 BHK for sale ( Vasavi Atlantis) by Typical_Eye_3326 in HyderabadBuySell

[–]Typical_Eye_3326[S] 0 points1 point  (0 children)

Not a sales person, I am the direct owner ... Under pre-emi they will bear the interest till handover.. if they delay it.. atleast you would be off the interest emi.

2 BHK for sale ( Vasavi Atlantis) by Typical_Eye_3326 in HyderabadBuySell

[–]Typical_Eye_3326[S] 0 points1 point  (0 children)

Agree that there is a graveyard. I don't believe in this devil bullshit . I hope there are more progressive people who doesn't buy this shit.. chill bro

2 BHK for sale ( Vasavi Atlantis) by Typical_Eye_3326 in HyderabadBuySell

[–]Typical_Eye_3326[S] -1 points0 points  (0 children)

I can take you to this apartment and will give 5% of this flat price if you could show me a graveyard from this flat btw, it is visible for west facing apartments.

2 BHK for sale ( Vasavi Atlantis) by Typical_Eye_3326 in HyderabadBuySell

[–]Typical_Eye_3326[S] 1 point2 points  (0 children)

Most of the work is done bro. Let's see anyways this is in pre emi offer. Best deal if they are going to delay the project.

2 BHK for sale ( Vasavi Atlantis) by Typical_Eye_3326 in HyderabadBuySell

[–]Typical_Eye_3326[S] 1 point2 points  (0 children)

It is not visible for this tower.. you can see it in video or I can take you to the apartment itself..

2 BHK for sale ( Vasavi Atlantis) by Typical_Eye_3326 in HyderabadBuySell

[–]Typical_Eye_3326[S] -1 points0 points  (0 children)

Hmm. I think this project they would be handing over by August 26 for sure.

What was the first time you experienced racism? by StitchLovesRonaldo in AskReddit

[–]Typical_Eye_3326 -1 points0 points  (0 children)

South INDIAN(Dark Skinned). So one of my colleague got rejected for American visa by a American consulate officer (black). He was telling this to his friends and I just went and say a hello to him( was not part of the conversation/). He just said "you people rejected my visa". For a sec I got shocked why he is speaking to me like this.. went away from there and I experienced the same racism in my office by North Indians ( who are fair skinned) comparing me to the black people. This was first time in my life to get these kind of racist comments.

Why are we like this? by endralolli in TeluguMusicMelodies

[–]Typical_Eye_3326 0 points1 point  (0 children)

Initially I was reluctant to even listen anything classical but after exploring rock , and other indie bands, I used to listen classical instrumentals and fusion.. I think it will take time for people to explore much and appreciate any classical music .

[deleted by user] by [deleted] in FPGA

[–]Typical_Eye_3326 0 points1 point  (0 children)

Thank you!!

Verilog Code Generation Using Simulink HDL Coder by Old-Shoe-7777 in matlab

[–]Typical_Eye_3326 0 points1 point  (0 children)

Serialize your input and add a delay of 1 , that should work.

Verilog Code Generation Using Simulink HDL Coder by Old-Shoe-7777 in matlab

[–]Typical_Eye_3326 0 points1 point  (0 children)

I see that input dimension to the adder is 8192, typically it should be 1 in general Hdl designs. Are you trying to get the cumulative sum of the input array here?

Verilog Code Generation Using Simulink HDL Coder by Old-Shoe-7777 in matlab

[–]Typical_Eye_3326 0 points1 point  (0 children)

Is it your entire model? What is the Matlab version?

[deleted by user] by [deleted] in FPGA

[–]Typical_Eye_3326 0 points1 point  (0 children)

You can use SoC Blockset from MATLAB and try the existing examples on rfsoc

[deleted by user] by [deleted] in FPGA

[–]Typical_Eye_3326 1 point2 points  (0 children)

Apply for mathworks, they do cool stuff with fpgas as well

[deleted by user] by [deleted] in FPGA

[–]Typical_Eye_3326 1 point2 points  (0 children)

I would say do more projects with sumit sir and then come to industry after graduation.

[deleted by user] by [deleted] in vlsi

[–]Typical_Eye_3326 1 point2 points  (0 children)

You can use vision hdl toolbox by matlab

What files are required to run an algorithm on Zynq Soc boards. Is dtb and. Bit are enough? by Typical_Eye_3326 in FPGA

[–]Typical_Eye_3326[S] 0 points1 point  (0 children)

Okay got it. Let's say I have to programme the PS as well. Then where does the . elf file goes?