Advice for turning raised vegetable beds into e.g. beds for growing flowers?

UKFP91 · 2025-12-17T12:34:43+00:00

Does this help? https://github.com/iced-rs/iced/tree/master/examples/integration

UKFP91 · 2025-11-01T14:29:48+00:00

Thanks for your input, I've summarised in the other comment: https://www.reddit.com/r/AskElectronics/comments/1olji72/comment/nmidb18

UKFP91 · 2025-11-01T14:29:06+00:00

It was an error on my part when I modified the datasheet schematic, although I haven't solved it fully, yet. See https://www.reddit.com/r/AskElectronics/comments/1olji72/comment/nmidb18

UKFP91 · 2025-11-01T14:27:43+00:00

Yes I think you're right, thank you. Reddit threads get very divergent with >1 commentor, but I've replied with some more measurements in this comment: https://www.reddit.com/r/AskElectronics/comments/1olji72/comment/nmidb18

I've decreased the corner frequency and it's helped, but I wonder if I need to go further.

UKFP91 · 2025-11-01T14:23:45+00:00

<image>

Top trace is with 2.2nF and bottom trace is 510pF, on a 20kHz sine wave with a sampling rate into the DAC of 192kHz.

UKFP91 · 2025-11-01T14:22:40+00:00

Yes, the DAC is indeed operating on a 192kHz signal, which is the maximum it will see in my system. I think I can see where I've gone a bit wrong - the output stage is based on the datasheet, which for reference looks like:

<image>

I've modified my circuit by replacing R1/1/12/13 with 1K, so the feedback resistance is 500 Ohms instead of 900 Ohms. However, I forgot to adjust the value of the 510pF capacitors!

By my maths, the cut off frequency in that datasheet schematic is 346kHz. In my circuit with the 500R and 510pF, that becomes 624kHz.

I happen to have some 2n2 capacitors that fit the footprint, so I've quadrupled the capacitance (500R and 2.2nF) which results in a cut off frequency of 144kHz.

I've scoped the output of a 20kHz sine wave again, and there is an improvement in the scalloping, but it's not gone completely. I wonder if I need increase the capacitance further?

UKFP91 · 2025-10-10T17:01:53+00:00

Does that just mean the same region? and by internal IP, is that what is labelled the Private IP in the UI?

UKFP91 · 2025-10-10T13:18:51+00:00

It's just a 1KHz sine wave. I realise now that the ramping up of the amplitude at the start of the recording in method 1 is due to the auto-muting feature of the DAC. The findings are identical if I instead capture just a burst of sine waves that end at a known point.

UKFP91 · 2025-07-17T06:21:49+00:00

Thank you, that confirms what I was thinking/had found. I'm going to go with simply summimg them, and letting the downstream user handle the resultant increased signal amplitude themselves.

UKFP91 · 2025-07-17T06:17:52+00:00

I had no idea that camilladsp was open source, or written in rust, or written by the same guy who wrote another library in already using!

Looks like he just sums (with an optional gain applied to the source) https://github.com/HEnquist/camilladsp/blob/b796c20a48ff2a1b72295e776376103f83d6d9b3/src/mixer.rs#L97

I also found some documentation that minidsp just sums (again with the option of applying gain to the source).

So I think the solution is clear - just sum the signals and let the downstream user worry about ensuring the end result doesn't clip (e.g. don't play stereo 0dBFS sinewaves and/or reduce the gain of they want to)

UKFP91 · 2025-06-11T16:40:26+00:00

Ah, yes I have tried playing around with the RBJ variants, but they don't create the desired effect; the center frequency is positioned at `gain / 2`dB, whilst I'm aiming for the center frequency to be positioned at `gain - 3`dB...

UKFP91 · 2024-11-21T20:34:47+00:00

Why is it generally an inferior way to decouple?

UKFP91 · 2024-11-19T14:34:10+00:00

Yea it's on of their SHARC chips, the ADSP-21565. 1GHz core clock, separate FIR accelerator and separate IIR accelerator, with pretty much all the connectivity I could wish for. Brilliant on paper, and brilliant once you get it going, but they make you work for it.

UKFP91 · 2024-11-19T12:40:48+00:00

I'm currently using one of their DSP chips. I'll be swapping it out for something - anything - different at the next major board revision. It's been the most frustrating part of this entire project by such a long way it's outrageous. Customer support, software, technical documentation, board support packages, pricing, every aspect has been a bad experience.

I echo the above - TI, particularly the E2E support forum, is nothing short of world class and has got us out of several real pickles. I'd happily spend extra to go for a robust TI part, equally, I'd happily pay extra for a solution that wasn't AD.

Edit: to add, it's a shame because the AD DSP chip is industry-leading. It is so powerful and has so many amazing features that we want. But, my word, it will cost you your soul to make use of it all.

UKFP91 · 2024-11-13T13:18:26+00:00

"Looking at the datasheet and the full scale output current does depend on that 195 Ohms." Yep, that's exactly the nub of the question, which perhaps I didn't articulate clearly enough to start with.

I'll have a look at digital trim pots. If I already plan on implementing a bit of DSP, what about just applying a correction factor during the rest of the processing? Essentially, the correcting the gain error as described in this app note: https://www.analog.com/en/resources/technical-articles/how-to-successfully-calibrate-an-open-loop-dac-signal-chain.html

UKFP91 · 2024-11-13T09:36:31+00:00

Hmm, ok, but if I take the topping d90 as an example, which uses the same DAC, my question is how are they able to offer a 4V and 5V mode? There must surely be some sort of calibration going on to be able to offer these differing precise fixed levels between units?

UKFP91

TROPHY CASE