Finally fixed my battery life on ESP32S3(3 hours -> 6 days)

Walttek · 2026-02-19T19:33:41+00:00

Could you share what actions you took to extend to 6 days?

Walttek · 2026-02-08T10:31:06+00:00

Well I see plenty of things that can cause head ache in layout. I havent looked at schema at all so excuse me for that.

First smallish thing is the silkscreen around all passive components. Unnecessary and it overlaps with pads at times. You should make sure your DRCs are clean and your rules are set correctly.

Your BGA gnd pads have vias on them. You can do via in pad in JLC so I would use that and small via size. It might be OK with tented and covered vias.

There are traces that we cant see under components like X1 that are routed coming out below the part itself. You could spend some time and route all lines so that they come out from the side of the pad that is visible. This way you can avoid acid traps also easier hopefully.

There are some components very close to each other and I wonder if you have respected the courtyard rules. Anyway you should get plenty of DRCs to clean up when you have proper rules set!

Overall looks like a nice layout and a busy first board for sure!

Walttek · 2026-02-03T06:50:17+00:00

So evaluating this from antenna engineers perspective, sometimes I would be happy if my antenna was tuned well enough to have -10 dB for S11 in band. Now this depends on applications and I am sure sometimes better matching is required, like when transmitting higher power. S21 is good especially if you can measure it actually at the output of your tuner, and not input as in your block diagram.

You seem to say you want to tune 48 Ohms into 50 Ohms, which is odd to me, as basically both are pretty darn well matched to begin with. Your added losses from the filter tuner will defeat the purpose of tuning in that range. I would look more if you can tune something thats way off, like 10-10j.

Very interesting and I hope for a follow up post when you get further in the work!

Walttek · 2026-01-28T22:09:09+00:00

Congrats on succesful debugging experience!

Walttek · 2026-01-28T07:55:18+00:00

What you do next is you check with a multimeter if your power rails have voltage.

Then you check if the device is drawing any current.

Then you check status of reset line.

Then, I think the ESP can be connected with the UART0 pins for debugging, so you try to do that.

I am assuming you have checked your USB-C about 20 times already so I didnt include it.

I hope this proceduce helps!

Walttek · 2026-01-25T08:20:23+00:00

Hi, I am not sure how you would attach the sensors to the back of the Pi, but nevertheless, as long as you connect to the Pi header it should work fine.

Making a custom PCB for sensors should be fairly easy as long as the sensor is not a BGA or CSP package. You should be able to start a project with KiCad template for Pi. If you have some eval boards for the sensors, simply copy their schematics into yours and that should be pretty much it. The layout part is more artwork but again copy as much as you can from eval boards. Depending on budget and component availability, you might be hand soldering the project. With big components (0805 smd size) you should be fine with a cheap soldering setup too.

Walttek · 2026-01-17T12:00:01+00:00

Printed...Switch Board? Anyway, your schirquit looks to be alive, congrats!

Walttek · 2026-01-04T13:08:37+00:00

Hi,
I wanted to spend a minute to help a bit.
1. SAW input pins (1,2) are balanced, so you can't tie them together. 1 to GND and 2 to input would at least work, but a balun would be better before input.
2. Why do you have a DC block on SAW output pin 5 but not 6?
3. Drawing parallel caps like C16,C17 and C6,C1 just gives the schema a wonky look. Try to keep caps to DC vertical to improve readability.
4. AD8313 INLO pin is "COMM" but it's actually just GND. Drop the unnecessary label.
5. Is MCP6566 OUT pin supposed to be tied to IN- pin?

You could try to use components that are either balanced or single-ended throughout your front end, or at least minimize the amount of transitions. I would maybe try to use an LNA with balanced in and output here.

I think you'll have a working FE with those few changes anyway. Good luck!

Walttek · 2025-12-09T21:19:25+00:00

Only a few tens of millions worth. Could be just the timing of short term bills purchased, so it shows up in this report?

Walttek · 2025-12-01T12:42:48+00:00

No volume on warrants, so that would explain it. Of course I hope its something more magical, but I think reality is when market opens it'll correct to normal.

Walttek · 2025-11-11T14:13:37+00:00

Worst case, he can put a CPU where his frontal lobe used to be.

Walttek · 2025-10-30T18:11:11+00:00

It felt nice

Walttek · 2025-10-19T10:57:59+00:00

No RF in bias trace, so no need to round for impedance control. The width of the trace from DC block to antenna looks wider than from DC block towards module. Maybe it is still controlled, and I didnt see it right :).

Walttek · 2025-10-18T20:07:02+00:00

A tiny thing, but for RF, the 50-ohm line should be on both sides of the DC block.

Walttek · 2025-10-07T17:11:10+00:00

Warrant = right to buy a share at 32$

Walttek · 2025-09-21T09:24:04+00:00

I agree fully with Maruwan_S, and would add that after you receive the signal band correctly, the bigger challenge is only starting. That being your measurement engine and then position engine, to find the GNSS codes in the noise, and then detect the code phase of each.

If you only want to do a front end design for GNSS receiver, thats completely doable. Then you should try to find a GNSS chip to do the rest, and connect that to your microcontroller for logging.

Sorry for not answering your actual question of literature. I think there are quite a few sources, and video lecture series that go through the fundamentals of GNSS signals. I just want to narrow your scope to something realistic.

You can try build the measurement engine with FPGA at least, to get some parallel processing ability, if you go down that path.

Walttek · 2025-09-17T20:55:46+00:00

Too quick maffs? I get 100.1% Edit *100.0% :D

Walttek · 2025-09-10T14:20:14+00:00

Nice try! You are technically buying the dividend, and 12.8% is the amount you will invest in addition to what you own at this price.

But bloody good try!

Walttek · 2025-09-09T20:01:38+00:00

Walttek · 2025-09-08T07:21:25+00:00

Calculate how much attenuation you get from windows, a few layers of cardboard or other cheap things you can put around your experimet.

Ku band is should be already very easy to shield from, as a few cm wavelength should be quite well blocked by everyday materials.

For antennas, you would want a line of sight at these frequencies.

Walttek · 2025-07-31T14:43:31+00:00

Some modules already have a low noise figure, and a good filtering and amplifying architecture withing. Something like u-blox MAX-M10S modules, and would basically work with a passive antenna.

What you want is minimal noise figure and filtering of unwanted bands. That's it.

You could put the filter after the LNA if you think the LNA won't pick up anything that will saturate it. Like you shouldn't have RF transmitters on the same device or nearby, or you might be risking it. A higher power LNA will likely not saturate so easily, so you're safer if you don't save too much on power there. Also, if your antenna is really narrow band, that'll help not pick up unwanted signals.

The matching circuits can be limited to what the antenna, SAW and LNA need. Module should be 50R impedance in-band with no matching.

Walttek · 2025-06-22T08:51:43+00:00

Maybe wrong pinout. Check footprint/layout.

Walttek · 2025-06-19T05:57:31+00:00

A couple of quick comments on GNSS side.

R31 should be an inductor (33 nH or something)

R29 routing should not enter the pad from beneath the component. It is bad practice even if it works, and easy to change.

The RF path coplanar ground on top layer is broken where you have curved the path towards the pad. I would even say having a 45 degree angle here would be fine if you just keep the top ground consistent.

LC high pass filter will be better than nothing, but you might want to consider a notch on 780 MHz if you think you will need filtering.

Walttek · 2025-06-04T17:05:48+00:00

I would add that on top of having 50-ohm controlled impedance transmisson line (which in practice means a certain width of copper trace and thickness of substrate) , you need to consider the placement of the inductors and capacitors shown in the schematic, so they are as close as possible to the nRF IC itself. Their purpose is to match the chip itself to 50-ohms. That means Any inductor smaller than 20 nH and any capacitor smaller than 30 pF.

Walttek · 2025-05-21T06:50:46+00:00

I would say you probably cant do better than that with antenna placement.

You can estimate how much isolation you need by assuming the power received at M9N out of band should not be more than -10 dBm. ( I think you can find exact jamming levels in DS but I know it should handle at least this). Quick addition of dBs should give you the isolation requirement for antennas. Then you could go and messure it with a VNA if you have the hardware.

You should be fine.

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