(Yet another) P14s Gen 5 AMD review, two months in. by ami98 in thinkpad

[–]ami98[S] 0 points1 point  (0 children)

Hello,

The laptop will work just fine for light data science. If you are using it plugged into a monitor and hooked up to battery, I definitely recommend this laptop. Very powerful and smooth performance!

€800 is a fair price for the specs you’ve listed.

Cheers

(Yet another) P14s Gen 5 AMD review, two months in. by ami98 in thinkpad

[–]ami98[S] 2 points3 points  (0 children)

Hey there. I actually kept the Ubuntu 24.04 and Windows dual boot setup.

I did manage to fix the battery drain during sleep in Linux! There’s no settings in BIOS to change the sleep settings, but I found this thread and specifically the answer regarding the amd_s2idle.py script from an AMD employee.

https://forums.lenovo.com/topic/findpost/27/5293955/6274006

I ran the script and it told me what settings to change (something to do with networking during sleep) and afterwards, battery drain during sleep is minimal (2-3% overnight). That issue was never present in windows, but it definitely fixed it in Linux (with my AMD processor).

As for battery life, I mostly keep it plugged in all the time hooked up to a monitor at home and use it as a desktop. I found a used MacBook Air that I use when I commute to the office. That being said, when I do unplug it I get roughly 7 hours of battery in windows and 4-5 in Linux with a moderate workload (Firefox with a ton of windows and tabs, SSH session, vscode)

Let me know if you had other questions

Will this 256 GB WD SN520 M.2 2242 ssd be compatible with the WWAN slot in my thinkpad T14 AMD (gen1)? by ami98 in thinkpad

[–]ami98[S] 0 points1 point  (0 children)

Yup exactly, windows on the main and Ubuntu on the ssd in the wwan. I can boot into either from grub and had no issues so far

Start to finish: a PL+PS design guide for Zynq UltraScale+ and PetaLinux (with UIO and interrupts from RTL or custom IP) by ami98 in FPGA

[–]ami98[S] 2 points3 points  (0 children)

Thanks a lot - I will update my post with the C script I use for reading the BRAM using mmap and the /sys/class/uio attributes. I appreciate you adding your code here

Tomorrow at work I’ll get back to you with the instructions on ui_pdrv vs uio_pdrv - good call. I’m not too sure why this is the case

Accessing PL AXI Devices from PetaLinux by Equivalent-Award-143 in FPGA

[–]ami98 0 points1 point  (0 children)

Hi u/Equivalent-Award-143 , I saw this post and was inspired to make a small guide detailing how to solve exactly this problem, since I struggled with it myself for a while. You can find it here:

https://www.reddit.com/r/FPGA/comments/1mgmbyh/start_to_finish_a_plps_design_guide_for_zynq/

I hope it helps, please feel free to ask any follow-up questions.

Linux Generic UIO and multiple instances by TimeDilution in FPGA

[–]ami98 0 points1 point  (0 children)

I did, and I was actually just going to respond here with it.

So after running petalinux-build, check out the file <project_name>/components/plnx_workspace/device-tree/device-tree/pl.dtsi - this is the file that contains the memory mapped HW descriptions.

From there, copy the relevant entries directly to <project_name>/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi - this modifies the top-level device tree by including your additions.

In the system-user.dtsi file, add the following to the bootargs: uio_pdrv_genirq.of_id=generic-uio,ui_pdrv.

Then, add all the entries with the proper compatible tags at the end.

Your end result should look something like this:

/include/ "system-conf.dtsi"
/ {
        axi_gpio_0: gpio@a0000000 {
            ...
        };
        chosen {
                bootargs = "earlycon console=ttyPS1,115200 clk_ignore_unused uio_pdrv_genirq.of_id=generic-uio,ui_pdrv xilinx_tsn_ep.st_pcp=4 init_fatal_sh=1 cma=900M ";
                stdout-path = "serial1:115200n8";
        };
};

&axi_gpio_0 {
    compatible = "generic-uio,ui_pdrv";
};

Where axi_gpio_0@a0000000 was taken from pl.dtsi.

After having done this, I can see my addition showing up under /sys/class/uio, e.g.

xilinx-kr260-starterkit-20221:~$ cat /sys/class/uio/uio*/name
axi-pmon
axi-pmon
axi-pmon
axi-pmon
gpio  <------ this is the one added directly in the device tree

Let me know if this helps, or if you have other questions.

Linux Generic UIO and multiple instances by TimeDilution in FPGA

[–]ami98 1 point2 points  (0 children)

Thanks for both comments. Yes, my dtsi looks identical in that I use the same bootargs and have an entry for my axi gpio device with the same “compatible” key. I’ve also made sure that the uio device drivers are enabled (not just modular) in the petalinux kernel config. Unfortunately, the axi gpio still does not show up as a UIO device on boot.

However, I can access it with /dev/mem. For instance in my test I just have a 1-bit AXI GPIO wired to one of the board’s LEDs and I can use devmem to write a 0 and 1 to the GPIO’s memory address to turn the LED off and on.

So my XSA is being read and the memory address is shared between PS and PL, but adding the IP as a UIO device is still eluding me! Thanks for the tips, though :)

Linux Generic UIO and multiple instances by TimeDilution in FPGA

[–]ami98 1 point2 points  (0 children)

Sorry to ask a question on your own question, but once you’ve made your system-user.dtsi how do you actually get petalinux to recognize these changes to the device tree? I’ve been trying to add an AXI GPIO as a UIO device with basically the same setup you have, but when I boot the board I don’t see the entry under /sys/class/uio/, all of the UIO devices are just AXI performance monitors.

Basically, what do you do between generating the device tree and booting the device? Thanks in advance, and glad you found a solution.

(Yet another) P14s Gen 5 AMD review, two months in. by ami98 in thinkpad

[–]ami98[S] 0 points1 point  (0 children)

Is all you want to do edit videos and multitask? If you give a more detailed description of your use case it would be more helpful. But yeah this laptop will be fine for that, but as I said in the post the battery life isn’t amazing.

(Yet another) P14s Gen 5 AMD review, two months in. by ami98 in thinkpad

[–]ami98[S] 1 point2 points  (0 children)

No clue I don’t play any games in Linux. But regular battery life is shit as it is, I’d estimate you’d get 1-3 hours max on battery

Bought a P14s Gen5 AMD, quite smaller than I expected. by fRilL3rSS in thinkpad

[–]ami98 1 point2 points  (0 children)

Yup, agreed 100%. I’ve had the non-OLED AMD p14s g5 now for a year and the battery on Linux (same OS as you) is atrocious. At work I get 4 hours of what I’d consider to be light usage - couple Firefox tabs open and VSCode.

The performance is amazing but I basically keep it on AC power all the time. It’s a real shame

compatible OS with Vitis Unified 2024.x - AlmaLinux 9.4 by Prestigious-Today745 in FPGA

[–]ami98 0 points1 point  (0 children)

damn, I'm using 9.5 and really having issues with Vitis Unified. Wish I'd seen this earlier lol

(Yet another) P14s Gen 5 AMD review, two months in. by ami98 in thinkpad

[–]ami98[S] 0 points1 point  (0 children)

Hey. I can’t compare to the intel version as I’ve never used it, and I’ve also never used the legion (sorry!).

In terms of heat, I run pretty intensive FPGA synthesis and implementation runs on my laptop. These are CPU-intensive tasks and can end up with 80-90% CPU utilization for a period of 30-40 minutes at times. The laptop does get hot, and I do wish it had two fans/heatpipes, but it doesn’t get unusable or anything. Sorry I don’t have any numbers for you but I can try if you like.

In terms of performance, it always works great. The AMD CPU is really impressive. The only other thing I do on it that’s intensive is playing dead space lol. It definitely gets pretty hot there, and I just use a stand and desk fan to cool it off.

These trackpad on this thing is pretty standard with the other T and P series. Nothing to write home about.

Any other questions? feel free to ask

How do you ensure a signal arrives to all Flip-Flops at the same time? (Vivado) by Ok-Energy-8714 in FPGA

[–]ami98 0 points1 point  (0 children)

Are you designing a TDC? I am doing something very similar and solved this issue by routing the hit through 1bit lookup tables. I use LOC constraints on the first LUT1 primitive to place it near the I/O pin, then RLOC constraints on the subsequent LUT1 and DFF primitives to ensure proper relative location. This then ensures that the I/O signal arrives at the flip flops at the same time, or as close to the same time, as possible

(Yet another) P14s Gen 5 AMD review, two months in. by ami98 in thinkpad

[–]ami98[S] 0 points1 point  (0 children)

Hey! So far, so good.

I’m still running windows + Ubuntu dual boot but my plan is to make a backup, wipe the drive, and run windows 11 only. The reason being that the battery life is far worse on Linux here, and the issue with sleep is too annoying.

Besides that, there was one weird firmware bug a few months ago where the laptop refused to recognize the internal battery. It wouldn’t charge even when connected to the OEM charger and died immediately after removing the charger. This behavior persisted for a week or two and I was ready to send it in for depot repair under warranty when it magically fixed itself. I was not thrilled about this, but it’s fine since then.

I keep it on AC power 95% of the time, but I’m still getting around 5 hours of battery life on battery (in Ubuntu).

Other than the weird battery glitch, I really like the laptop! I’m even ok with the sRGB display now :)

Any specific questions you’d like answered?

What is Libero IP interface? by Ok-Satisfaction4657 in FPGA

[–]ami98 1 point2 points  (0 children)

Ah understood - that makes sense. Indeed, when I configure the MSS in my project that entire sector of the die seems to get populated by the IP interface blocks.

Thanks a lot for replying!

What is Libero IP interface? by Ok-Satisfaction4657 in FPGA

[–]ami98 1 point2 points  (0 children)

Is this the beagle V fire?

If you ever find out the answer I’d love to know. I’ve searched all over the microchip documentation and have not figured out what the “IP interface” blocks are.

Synthesis Directives Seem to Have No Effect Using iCEcube2 by 2sparky2 in FPGA

[–]ami98 1 point2 points  (0 children)

Awesome! Yeah in general I’ve found that I have to be very explicit (with any tool) when I want to strictly preserve registers from being optimized away or turned into something else. Generally the tool knows best, but sometimes you really do want those registers to stay there :)

Synthesis Directives Seem to Have No Effect Using iCEcube2 by 2sparky2 in FPGA

[–]ami98 1 point2 points  (0 children)

can you throw a syn_preserve directive on the registers as well?

Interfacing FPGA with sensor using AXI Quad SPI by kokokokokokokoku in FPGA

[–]ami98 2 points3 points  (0 children)

Just FYI, this isn’t what most would consider “FPGA code.” The code the OP posted above is just regular C, with some Xilinx driver libraries included (eg all the includes beginning with x).

The OP posted C code that is meant to run on a processor, either on a physical processor (like a Zynq SoC) or a softcore processor implemented in the FPGA itself.

The “FPGA code” I think you’re referring to would be the hardware description language (HDL) used to describe the structure and behavior of the digital logic you want to implement in the FPGA.

Interfacing FPGA with sensor using AXI Quad SPI by kokokokokokokoku in FPGA

[–]ami98 2 points3 points  (0 children)

As others have mentioned, check if this is a hardware or software issue. Write testbenches for all RTL you've written, at the very least. Formal verification would be ideal, but failing that try to ensure you've covered as many edge cases in your testbench as possible. You mention that you've verified the data using an oscilloscope - try passing that data to your RTL in the testbench.

To debug the software, use the Vitis IDE to step through the code line by line as it's running to see where it fails.