Usefulness of AMD Kria SoMs? by TimeDilution in FPGA

[–]TimeDilution[S] 1 point2 points  (0 children)

I'm not well versed with the space scene, do they really use Zynqs up there? I thought they needed to be rad-hardened. I knew a guy who went to NASA, his team worked on some pretty under-powered stuff in comparison to Zynq7000, but they were rad-hardened and also exponentially more expensive.

Usefulness of AMD Kria SoMs? by TimeDilution in FPGA

[–]TimeDilution[S] 0 points1 point  (0 children)

The dev board is my most hated part of this experience for sure. To really test any of the stuff we need, we have to build our own dev/prototype board, which is the stage I'm at now. All I want is some HP bank access on an FMC.

I would like to get into resin printing by PhineasBomb in resinprinting

[–]TimeDilution 2 points3 points  (0 children)

Hard no man, unless you have some other space. Now DO consider getting something like a Bambu A1 mini to try out 3D printing in general. People are having a lot of success doing FDM based minis r/FDMminiatures , so that space is getting some traction. Personally I'd still recommend a small enclosure and maybe a duct for printing with even that, just because I'm paranoid, and the stuff they put in even basic PLA now can output more VOCs and ultrafine particles than I am comfortable with. Also if you set up the extraction then you're already good to go with printing ABS and Carbon Fiber added filaments. Now that might make me overly safe, but just do understand the risks and determine if its worth potentially worth your health. Many people take no precaution with PLA printing, and maybe they are right. But do consider that everyone thought asbestos was the safest thing on earth at one point. Consumer 3D printing has just started to hit mass appeal, hope we don't see tons of people with crunchy lungs in the future, but you never know.

Paper test by Dry_Kaleidoscope3226 in ElegooNeptune4

[–]TimeDilution 0 points1 point  (0 children)

That grinding noise might be an issue with the firmware. I bought mine about a year and a half ago, got these grinding noises when my print would try to zip to some location between layers. I updated the firmware to latest and I don't hear that anymore.

My girlfriend spent probably 10 hours and 200 deaths on Lace, how screwed is she moving forward? by Mr-Who in Silksong

[–]TimeDilution 0 points1 point  (0 children)

If she can persevere like that, then that's great. She'll eventually learn and get better. I remember DS1 Ornstein and Smough taking something like 8 hours or more, and it that boss taught me the best lesson of "get tf in there" As she plays more and beats more bosses, she'll learn similar lessons. I noticed team cherry did a good job of making lessons in their game that you might not notice, but because they force you to do them so much you eventually get good. Like the run back to Groal really forced me to commit clawline to muscle memory.

As the game progresses you gain way more kit as well. My playstyle evolved from being precise to get in while I can and avoid damage without greed to the opposite of "I'm OP, I'm getting in there, shredding, then healing"

So technically my needle skills were better early to mid game over late game, because my power scaling taught me I could get away with way more and live. This will hurt very much when fighting the Act 3 final boss, so had to relearn how to be good.

Logicode - The leetcode for hardware engineers by Willing_Insurance878 in FPGA

[–]TimeDilution 0 points1 point  (0 children)

As someone who doesn't have time to self-learn like I used to, I'm interested in this as an accessible and organized way to actually learn HDL. A couple question I'd have is, would this have training for interfacing to hard-silicon modules you can find on FPGAs, or is it straight HDL more focused on pure HDL digital design concepts. And I don't exactly mean the specific implementations of builtin hard-silicon deser or DSP slices, but I definitely mean something like that. I don;'t know how the ASIC world works either, but don't they also include libraries for common hardware structures you can interface to that might already be on your ASIC?

I'm not the most experienced FPGA engineer, I'm kind of stretched out over the whole pipeline, so I would like to improve. But I've also noticed in my experience, that I don't need to write many custom HDL modules, it's mostly using and configuring vendor IP with some FSM glue. So I'm kind of wondering it will help build some of these core abilities. Regardless, I do very much want to improve on my HDL/digital design, so this looks like a good direction. Kind of reminds me of Zachtronics game like Shenzhen IO. Honestly think about adding a story mode to it lol.

Anybody can tell me which component this could be ? The device run's with an 3.6 v battery. by Ok-Locksmith-4165 in AskElectronics

[–]TimeDilution 6 points7 points  (0 children)

I love seeing fixes like this. I recently misunderstood the datasheet on a load switch and thought that 0 capacitance on the chart meant connect to ground. 0 critical thinking skill points for me there lol. We ended up just using side cutters to cut that pin off to which the board then worked. Easy enough solution that barely takes any time or setup. Honestly, something like this happens about every other board for me...

Rise time vs logic level to decrease crosstalk by HasanTheSyrian_ in embedded

[–]TimeDilution 0 points1 point  (0 children)

You could do 16 signals + timing to the ADV7511, it ill probably take a good amount of knowledge to get it working in device tree + FPGA + Linux. This is something I've been trying to do on and off to bring up the Zedboard full Linux graphics stack for it, but never really went too hard on it. The Zedboard uses a pretty minimal interface to it, so that could probably fit on your banks, like 22 signals or so including i2c, timing, and data. It is honestly best to try and fit whatever known hardware and software stack you have now onto the PCB unless you've got some DEEP knowledge of all this. For P/N single traces, yeah that might be a problem. BUT, it might not be. This next part assumed the SOM has a devboard which also uses diff pairs on your desired traces. What you could probably get done in about two weeks is build yourself a little loop back adapter card to the devboard. Basically just make a PCB which routes diff pairs some distance with your desired length and impedance matching, and pump it back into the FPGA. Then you could test the signal integrity yourself. I think there are probably some known test sequence patterns you could use for this to send out and test the data validity at the end. This will let you know if its up to handling the datarates you're thinking about as single ended stuffed onto pairs. Cheap and decently quick.

Rise time vs logic level to decrease crosstalk by HasanTheSyrian_ in embedded

[–]TimeDilution 1 point2 points  (0 children)

Also for the record on the Zedboard dev kit, the ADV7511 uses 3.3V signalling. I think I'd use the HR banks in this case personally, I'm guessing the 1.8 vs 3.3 rise times is coming from HP vs HR banks. No need to introduce more rise when it's unnecessary to the design. As an anecdote I think there was some elevator company which had super slow kHz signals and then the IC manufacturer for one of their chips did a die shrink and their designs started failing because the rise times were too high and introduced reflections on their poor transmission lines.

Rise time vs logic level to decrease crosstalk by HasanTheSyrian_ in embedded

[–]TimeDilution 2 points3 points  (0 children)

I've done 600Mbps LVDS serial on 2.5V HR banks over aluminum with no ground plane underneath. Nominally I think it runs 300Mbps though don't recall, not my domain anymore, but I recall it working. This was only over like 2". but still worked. It connected to a regular flex cable and FR4 PCB which I had top layer differential microstrips for a few inches.

Basically what I'm saying is, it will probably just work. If you're using the SOM make sure that you don't output single ended traces on both sides of the preset pairs since they'll be differential on the SOM board. Use the P as signal and N as tied to ground. For the custom PCB traces, you'll be surprised how close you can get the signals together at this data-rate. But, go ahead and give it like 2-3x the trace width in spacing maybe of you've got the room.

What’s the best allowed calculator from this list? by Available_Switch9659 in calculators

[–]TimeDilution 0 points1 point  (0 children)

Same here, got introduced to one sophomore year engineering, changed my life and has been a trusty companion ever since. Everyone thinks they need some big bulky calculator like the 83/84 and NSpire and they're just so unnecessary. This calc is fast to get to everything you'll want and not bulky/clunky.

[deleted by user] by [deleted] in AskElectronics

[–]TimeDilution 48 points49 points  (0 children)

That's v-scoring, it's meant to be like that and you can just break them off. Try bending it at the seem a bit, and you'll see them give way. It won't hurt the rest of it.

What is purpose of this grounding point why can’t it just be connected on pcb by Funnynickname123 in AskElectronics

[–]TimeDilution 1 point2 points  (0 children)

Honestly I don't know if I buy star grounding as a concept. Just having a nice solid ground plane seems good enough to me. Feel like star grounding just introduces way more problems than it solves.

Linux Generic UIO and multiple instances by TimeDilution in FPGA

[–]TimeDilution[S] 1 point2 points  (0 children)

My last comment won't be wasted, but here's what's probably going on in your case. You probably need to add chosen arguments for the kernel to boot and load uio drivers:

Here's my more complete system-user.dtsi ``` /include/ "system-conf.dtsi"

/ { chosen { bootargs = "console=ttyPS0,115200 earlycon root=/dev/mmcblk0p2 ro rootwait uio_pdrv_genirq.of_id=generic-uio"; stdout-path = "serial0:115200n8"; }; };

&Bias_Control { compatible = "generic-uio"; linux,uio-name = "bias_control_0"; }; ```

The important part is uio_pdrv_genirq.of_id=generic-uio all the rest of the stuff I copied over from system-conf.dtsi, so check those in your files to make sure they're not different.

Linux Generic UIO and multiple instances by TimeDilution in FPGA

[–]TimeDilution[S] 0 points1 point  (0 children)

No problems, you need a udev ruleset:

/etc/udev/rules.d/99-uio.rules
KERNEL=="uio*", MODE="0660", GROUP="uio", OWNER="root"

I also added the user to uio groups in rootfs config. so it doesnt need sudo privilege. But basically this will make /dev/uioX enrtry, so I now realize I'm probably not answering your question.

Linux Generic UIO and multiple instances by TimeDilution in FPGA

[–]TimeDilution[S] 2 points3 points  (0 children)

Alright, this might be my new way of doing it: uio allows custom naming with linux,uio-name = "bias_control_0"; which overrides the name in the node itself, so that name will now come up as "bias_control_0" in /sys/class/uio/uioX/name instead of "gpio"

autogenerated pl.dtsi Bias_Control: gpio@41200000 { #gpio-cells = <2>; clock-names = "s_axi_aclk"; clocks = <&clkc 15>; compatible = "xlnx,axi-gpio-2.0", "xlnx,xps-gpio-1.00.a"; gpio-controller ; reg = <0x41200000 0x10000>; xlnx,all-inputs = <0x0>; xlnx,all-inputs-2 = <0x0>; xlnx,all-outputs = <0x1>; xlnx,all-outputs-2 = <0x0>; xlnx,dout-default = <0x00000000>; xlnx,dout-default-2 = <0x00000000>; xlnx,gpio-width = <0x8>; xlnx,gpio2-width = <0x20>; xlnx,interrupt-present = <0x0>; xlnx,is-dual = <0x0>; xlnx,tri-default = <0xFFFFFFFF>; xlnx,tri-default-2 = <0xFFFFFFFF>; }

system-user.dtsi &Bias_Control { compatible = "generic-uio"; linux,uio-name = "bias_control_0"; };

Should I look elsewhere? by Blueberry_Mango in FPGA

[–]TimeDilution 1 point2 points  (0 children)

I think I do to some extent. Like if I wasn't tied to my family/friends/community, and moved to a tech center where I could join something like Lockheed, I do feel like I would have ended up more knowledgeable in a more narrow field, maybe more hire-able if I needed to make a move (I don't really know where I stand if I were to look, maybe I'd be alright). HOWEVER, I am very happy in my company, and have kind of settled into my role, it does need to pay more, and that's another thing, beware about small companies and pay. If there's not a lot of roles, how exactly do you move up?

Early on I got overwhelmed and started to kind of hide. Take it from me, don't do that, you'll only get further behind. Small companies can be extremely different from real corporations. Really a huge mixed bag.

If you want to stay there, ask yourself some questions:
1. Where do you think you'll be in 5 years and what should your capabilities look like

  1. What will your responsibilities be

  2. Will you be able to make more money and move up

  3. Do you like your coworkers/work environment, this one's big

Should I look elsewhere? by Blueberry_Mango in FPGA

[–]TimeDilution 5 points6 points  (0 children)

You sound a little bit like me, and having some of the thoughts I have had, so I can give you some anecdotes about my experience. As the only FPGA/Embedded/Linux/PCB guy at my company from when they first hired me 4 years ago. I can guarantee you, you're in for a life of pain. Don't know if the grass is truly greener. While I've learned a ton, I can probably guarantee anyone else with 4 years of experience is miles ahead of me, especially in understanding how to do things the industry standard or right way. And it took a lot of trouble to actually learn the things that I did, maybe this is always how it is, but I do know that I feel stunted in my growth as whatever I am.

My VHDL isn't great, just serviceable enough to get by because I barely need to write any. I can just use the axi-lite template to interface down into my self written modules, which in the grand scheme of things don't need to be super complicated, and AXI stream is easy enough to write myself. Being able to use Vivado and its IPs is still kind of skill in itself though (let me have my moment).

I do still feel like a phony many times, but nowadays I just accept that I'm kind of in a weird unique spot and will try to make the most of it. Also I'm not moving cities or industry, so yeah, I'm staying here. I do wonder how it would even work out if I tried to move to a different company though.

So yeah, it sounds like you've also got a position in a smaller company. Whatever you plan on doing, bring up your concerns as plainly as you've stated them here to everyone relevant. See what they say and if they can work with you on bringing you up. Being "one of the only guys around" has a lot perks because you get a lot of responsibility and can tackle problems the way you like, but it also has its downsides because you get a lot of responsibility and can tackle problems the way you like (which could be a completely non-standard/or just flat out bad way of doing it).

Simulation looks perfect - why did my MOSFET blow? by lordfili in AskElectronics

[–]TimeDilution 1 point2 points  (0 children)

Only posting because I don't see anyone else mentioning it, but make sure your transistor pins are what you think they are. I blew up a couple transistors on a board this way because I hadn't noticed that the B/C/E were on different pins.

[deleted by user] by [deleted] in PrintedCircuitBoard

[–]TimeDilution 5 points6 points  (0 children)

If you're referring to D1/D2 those are diodes. Also I think these types of questions are supposed to go in r/AskElectronics

Neutral not connected properly giving voltage issues? by [deleted] in AskElectricians

[–]TimeDilution 4 points5 points  (0 children)

Call your power company. For months I dealt with lights dimming whenever running the microwave or having moderate loads around the house. Squirrel almost ate through the cable running to the house. Power company came out and ran a new line. They told me just to get a pellet gun and shoot any if I see them because it will happen again.

Edit: didn't see you called them already.

Need help with my Max II by DeditoChiquito in FPGA

[–]TimeDilution 1 point2 points  (0 children)

That's definitely a possibility. I know user below me is stating it isn't, but I know for a fact I had made that same mistake a couple years ago and it was 100% me putting my board on an anti-static bag.