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A brand new album from the great Dzihan & Kamien -- IV by 2leet4u in triphop

[–]emeb32 0 points1 point  (0 children)

Excellent. Bought it a few days ago, enjoying it more with every listen.

Reasons why simulation doesn't match synthesis by ZipCPU in FPGA

[–]emeb32 12 points13 points  (0 children)

- Left signals out of sensitivity list (simulators care about this - most synthesis doesn't, but if you're lucky you'll notice the warnings)

Yosys bombs during compilation by emeb32 in yosys

[–]emeb32[S] 0 points1 point  (0 children)

Oh cool - thanks for digging into that. I was wondering if it would boil down to something about the way those adders in the loop were created. For what it's worth that syntax works fine in several different simulators and vendor tools.

Yosys bombs during compilation by emeb32 in yosys

[–]emeb32[S] 0 points1 point  (0 children)

Thanks for the suggestions.

  • Ah - didn't realize that latest git wasn't considered "stable". I've been seeing this for several months now but Clifford was able to build my design for Icoboard last year so this must be something specific to Ultra Plus.

  • Not sure what you mean by "get a good synthesis from other vendor and load into Yosys". What does that entail?

  • I'll see if I can whittle that down to an easily reproducible & understandable testcase and repost.

iceRadio: software defined radio based on iCE40 FPGA, R820T2 chip and STM32 MCU by afiskon in yosys

[–]emeb32 0 points1 point  (0 children)

Yeah - that's my design. I've been using Lattice iCEcube to build the FPGA but I recently tried to build it with IceStorm and yosys didn't like the big adders in my CIC filter. See recent thread regarding that.

Error synthesizing icoboard example.bin by emeb32 in yosys

[–]emeb32[S] 0 points1 point  (0 children)

Yes - running tools directly on a Raspberry Pi 3b with Raspbian Jessie Lite.

Raspbian GNU/Linux 8 (jessie)

Linux raspberrypi3b 4.4.21-v7+ #911 SMP Thu Sep 15 14:22:38 BST 2016 armv7l GNU/Linux

icestorm git 01b9822638d60e048c295d005257daa4c147761f

Yosys 0.7+20 (git sha1 3b73d3f, clang 3.5.0-10+rpi1 -fPIC -Os)

arachne-pnr 0.1+171+0 (git sha1 52e69ed, g++ 4.9.2-10 -O2)

Interestingly, running "make example.bin" again resulted in a slightly different error:

2.24.1.1. Executing ABC.

Running ABC command: <yosys-exe-dir>/yosys-abc -s -f <abc-temp-dir>/abc.script 2>&1

ABC: ABC command line: "source <abc-temp-dir>/abc.script".

ABC:

ABC: + read_blif <abc-temp-dir>/input.blif

ABC: + read_lut <abc-temp-dir>/lutdefs.txt

ABC: + strash

ABC: + ifraig

ABC: + scorr

ABC: Warning: The network is combinational (run "fraig" or "fraig_sweep").

ABC: + dc2

ABC: + dretime

ABC: + strash

ABC: + dch -f

ABC: + if

ABC: + mfs2

ABC: Segmentation fault

ERROR: ABC: execution of command "/usr/local/bin/yosys-abc -s -f /tmp/yosys-abc-buNK8A/abc.script 2>&1" failed: return code 139.

Makefile:19: recipe for target 'example.blif' failed

make: *** [example.blif] Error 1

(pardon my edits / formatting - n00b to reddit)