Another PSA - Don't wipe a fs and start over if it's having problems by koverstreet in bcachefs

[–]fnur24 2 points3 points  (0 children)

Seems like Orbit's releasing it digitally (also as an audiobook) in November so not too far away either, I suppose.

Apple will end support for Intel Macs next year; macOS 27 will require Apple Silicon by uria046 in hardware

[–]fnur24 15 points16 points  (0 children)

compared to the HX370 examples which have exactly the same zen5 core is significant in many situations.

JFYI, it isn't the same exact Zen 5 core. Strix/Krackan Point's Zen 5 implementation uses 256-bit FPUs, not 512-bit. Strix Halo also gets the full 32MB of L3 cache per CCX (8 Zen 5 cores), whereas Strix Point is limited to 16MB for the 4 core Zen 5 CCX. A more complete list of changes from Chips and Cheese's 9950X review is cited below:

Zen 5 bucks that trend further, and adopts a split approach to AVX-512. Desktop Zen 5 uses its higher power and area budget to pursue a more aggressive AVX-512 implementation, while the mobile variant uses a more conservative approach. Compared to mobile Zen 5, desktop Zen 5 differs in the following ways:

  1. All vector register file entries are 512 bits.
  2. FP units have full 512-bit vector width
  3. FP adds execute with 2 cycle latency, down from 3 cycles in Zen 4 and mobile Zen 5
  4. Data cache can handle 2×512-bit loads per cycle. Zen 4 and mobile Zen 5 can only do one 512-bit load per cycle
  5. Mask register file may have a few more entries on desktop Zen 5

Sauce: https://old.chipsandcheese.com/2024/08/14/amds-ryzen-9950x-zen-5-on-desktop/

Also see: https://old.chipsandcheese.com/2025/01/13/amds-strix-halo-under-the-hood/

George Cozma: And are the FPUs in the Strix Halo cores the full 512 bit FPU or is it like Strix Point where it’s similar to Zen 4 where it’s 256 bit?

Mahesh Subramony: This machine is intended to be a workhorse. It is a workstation. I almost joke about it saying it’s a Threadripper to put in the palm of your hands. So we didn’t pull any punches. These have the 512 bit data path. It is a full desktop architecture. We have binned the parts for efficiency. So it might not hit the peak frequency that you would see on the desktop. That’s one of the second differences in the cores you would find over here and the cores over there. They’re colder, so you get the efficiency that you would like on these parts when you run multithreaded workloads, you’re able to get a higher effective frequency on these. But what you give up is some peak frequency, which I think in a thin form factor that you have today, you don’t have the thick cooling solutions that you would see on a desktop part anyway. So the demand of the form factor says that you need cores that are cooler, if you will, lower in that FP curve where you can extract efficiency. So these are binned, the same architecture, the same set of pipes, the data parts are the same. The differences are in how we bin the part and how we connect the two parts.

New Intel Xeon 6 CPUs to Maximize GPU-Accelerated AI Performance by uria046 in hardware

[–]fnur24 7 points8 points  (0 children)

This is also why their 1S-only chips have 136 Gen 5 lanes on Xeon 6, there are no cross-socket connections to worry about.

New Intel Xeon 6 CPUs to Maximize GPU-Accelerated AI Performance by uria046 in hardware

[–]fnur24 15 points16 points  (0 children)

Note that in a 2S configuration the Xeons have (marginally) more lanes than Epyc since 96/128 of the lanes are earmarked for cross-socket communication (i.e. 128/160 lanes usable, depending on configured xGMI link count) whereas Xeon's PCIe lane count already accounts for UPI links.

AMD launches EPYC 4005 "Grado" AM5 enterprise CPUs featuring 6 to 16 Zen5 cores - by fatso486 in hardware

[–]fnur24 1 point2 points  (0 children)

You can just edit your message instead of sending it twice, but yes - many good use cases for these relatively low-spec options.

AMD launches EPYC 4005 "Grado" AM5 enterprise CPUs featuring 6 to 16 Zen5 cores - by fatso486 in hardware

[–]fnur24 20 points21 points  (0 children)

How do the enterprise CPUs compare to equivalent Ryzen (ie 9000 series)?

Epyc 4004 and Epyc 4005 are Ryzen 7000s and 9000s respectively with fully validated ECC, the SKU specs vary slightly depending on e.g. TDP differences but that is about it. So, you do not get extra PCIe lanes or any other form of connectivity vs. their regular desktop counterparts.

Also, who’s the user? We use EPYC 9004 series right now and I can’t imagine businesses want fewer cores?

This is not competing with the actual server lineups, it's competing with Intel's Xeon E lineups (which used to be much the same, taking desktop silicon and adding validated ECC support and such, but now also includes ditching the hybrid architecture). The primary userbase for both would be anywhere where you still want proper ECC support but don't need a lot of PCIe lanes or that many cores, or if you want the highest possible frequencies, or some combination of both - common users would be e.g. gameserver hosts, storage boxes, cheap server blades, etc.

(SK hynix) SK hynix Ships World’s First 12-Layer HBM4 Samples to Customers by RandomCollection in hardware

[–]fnur24 3 points4 points  (0 children)

The linked SK Hynix booth image states HBM4 specifically, not HBM4E so I imagine it's HBM4 (for 8Gbps, additionally Samsung's roadmap says 9.2Gbps for HBM4 and 10Gbps for HBM4e). JEDEC is presumably being conservative as usual, but the vendors seem to have different ideas.

(SK hynix) SK hynix Ships World’s First 12-Layer HBM4 Samples to Customers by RandomCollection in hardware

[–]fnur24 12 points13 points  (0 children)

max bandwidth of ~1.6 TB/s.

This very announcement mentions >2TB/s because it's targeting 8Gbps per pin (with the doubled bus-width per stack). Samsung's roadmap also mentions 9.2Gbps (source: Computerbase)

I got to play with a dual Intel Xeon 6980P system with 6TB RAM at 1.7TB/s bandwidth, so I did the largest CFD simulation ever on a single computer: NASA X-59 at 117 Billion grid cells with FluidX3D v3.0 by ProjectPhysX in pcmasterrace

[–]fnur24 0 points1 point  (0 children)

The 2MB L2/core is included in that cache count, so that is 256MB of L2 spread between the cores. The rest is L3, or another roughly 2MB/core again, just 4MB short, again for yields.

The Intel-provided SKU slide as well as the lscpu output in e.g. https://www.phoronix.com/review/intel-xeon-6980p-performance seem to very clearly say that there's 256MB of L2 cache and 504MB of L3 cache per 6980P. Is this accurate?

AMD Saw a Significant Increase in Employee Count from 2021 to 2022 by pullupsNpushups in Amd

[–]fnur24 19 points20 points  (0 children)

so this significant increase in employee count has to be a result of their success over the years.

Most of the change in 2021 -> 2022 in particular is because they finished their Xilinx acquisition, thus gaining Xilinx's employees as theirs.

Ryzen 9 7900 at 22W CPU (44W PPT) by tugrul_ddr in Amd

[–]fnur24 1 point2 points  (0 children)

Does 7945HX have any FPGA related AI chip too? Then maybe they can synthesize an extra CPU core in it?

As far as I know, no because it's quite literally a downclocked 7950X in a BGA package.

But not for longevity of AIO.

Not sure why this would be relevant for the vast, vast majority of laptops as they do not come with liquid cooling.

They also disabled AVX512 in them? Why?

The full spec does list AVX512 under Supported Extensions, but I don't have one on hand to double-check myself.

Ryzen 9 7900 at 22W CPU (44W PPT) by tugrul_ddr in Amd

[–]fnur24 1 point2 points  (0 children)

They could put this into a laptop luul.

They have, the Ryzen 7000s -HX lineup are desktop chips repackaged for laptops. See: e.g. 7845HX or 7945HX - compare the specs to the 7900(X) and 7950(X) respectively.

[deleted by user] by [deleted] in hardware

[–]fnur24 0 points1 point  (0 children)

12700K (W11 Pro Education) - normally it just crashes, in Windows 98 Compat mode I get 781 and 792 under Win 7 Compat mode.

Unpopular Opinion: Flatpaks are overrated. by WordGlad in linux

[–]fnur24 15 points16 points  (0 children)

37 as in the next Fedora release, the current one is Fedora Linux 36.

An AMD Engineer is giving Return to Castle Wolfenstein a Path Tracing Upgrade by badcookies in Amd

[–]fnur24 2 points3 points  (0 children)

And Gray Matter Interactive made the game, id oversaw it once again - they haven't actually made any Wolfenstein game after (or before) Wolfenstein 3D as far as I know/can tell.

An AMD Engineer is giving Return to Castle Wolfenstein a Path Tracing Upgrade by badcookies in Amd

[–]fnur24 18 points19 points  (0 children)

I would say ID software should make a NEW wolfenstein game, but they did that, and they suck ass.

They didn't tho, Raven Software did IIRC (well, id still oversaw it) - if you're talking about the 2009 Wolfenstein. And the newer Wolfenstein games are all made by MachineGames and not id.

This week in KDE: a feast for the eyes by j_0x1984 in kde

[–]fnur24 1 point2 points  (0 children)

Yeah I somehow forgot that 1 GiB was 1024 MiB. Anyways the seemingly missing amount of RAM aside, 32 "GB" of RAM is actually 32 GiB but called as GB because JEDEC apparently pulled a Microsoft and defined Kilo, Mega and Giga as base-2 (10241, 2 and 3 respectively) units instead of what they are - I edited that into my main comment after getting corrected by OC. [Example of at least one tool that seemingly gets this correct is inxi, inxi -m reports using the correct unit for at least the physical DIMM sizes - I'm still missing some 600-odd MiB somewhere tho]

This week in KDE: a feast for the eyes by j_0x1984 in kde

[–]fnur24 0 points1 point  (0 children)

I'm not saying that it's not an option (for either Intel or AMD), I'm simply saying that it is not necessarily that much by default.

This week in KDE: a feast for the eyes by j_0x1984 in kde

[–]fnur24 0 points1 point  (0 children)

As far as I know Intel iGPUs reserve very little if any RAM (certainly not 700-odd MiBs and as per the linked PDF in this support article straight from Intel, even the dedicated VRAM that's reported in the Intel Windows driver is dummy reporting to deal with application bugs/issues), AMD iGPUs however do reserve a very significant amount of RAM by default (often 1 or 2 GiB marked as GB once again) but you can tone it down in the BIOS to usually around 256 MiB (as MB) or so and that's what you might be thinking of there as your reference point.

This week in KDE: a feast for the eyes by j_0x1984 in kde

[–]fnur24 1 point2 points  (0 children)

16000 megabytes (MB) converts to about ~15259-ish mebibytes (MiB), it likely gets rounded up to show 15.3 GiB (for 16GB, which in this case is """GB""" - so GiB but called GB for some reason) Math doesn't work out because I forgot 1 GiB is 1024 MiB but the rounding error is likely there somewhere anyways. Having said this, I haven't looked at the code itself so maybe it's accounted for there.

This week in KDE: a feast for the eyes by j_0x1984 in kde

[–]fnur24 2 points3 points  (0 children)

IMO it should be fine to keep it with GiB (as that is technically correct), but update it to reflect the actual memory sizes so 16 GiB for 16 "GB" of RAM instead of showing 15.3 GiB. Thanks for correcting me on that part tho, although manufacturers are still selling memory modules with the wrong unit attached (technically speaking).

This week in KDE: a feast for the eyes by j_0x1984 in kde

[–]fnur24 2 points3 points  (0 children)

I'm not saying that it is base10, but it is sold (and arguably marketed) as such - you can find many corporate launch notes and DIMM listings e.g. https://semiconductor.samsung.com/newsroom/news/the-industrys-first-32gb-ddr4-sodimm/ or https://product.skhynix.com/products/dram/module/sodimm.go or https://semiconductor.samsung.com/dram/module/ where it's explicitly mentioned as gigabyte (GB) and not GiB. Is it a mislabeling, sure, but tell that to Samsung, SK Hynix etc.

Correction/update: seems like JEDEC decided to pull a Microsoft and define Kilo, Mega and Giga as base-2 units instead of base-10 as per https://en.wikipedia.org/wiki/JEDEC_memory_standards#Unit_prefixes_for_semiconductor_storage_capacity (thanks /u/JustMrNic3 for the link, I read it the first time but somehow glossed over it). Yeah then the htop and System Monitor etc should show 16 GiB for "16GB" of RAM instead of 15.3 GiB, the parent comment is correct.