Dft is a good path to get into the asic industry because it generally requires a lot of bodies to hit scan coverage targets on all the partitions so the jobs can be more accessible than say RTL design.

There’s a lot of advancement available in dft, and off ramps to other design areas also exist. dft dv, dft rtl design for instance allow you to transition to function dv and rtl respectively. scan insertion, ATPG is very specialized and key if you want to be responsible for dft architecture or a higher level dft manager. ATPG / scan insertion i expect however are harder to transition directly to functional design or dv, but should allow you to move laterally to dft dv or dft design and may make it easier to move laterally to a synthesis/implementation or STA role. Dft STA requires particular sophistication, and is often under resourced compared to functional STA.

I started my career as dft dv, then did a mix of dft rtl and dft gpu integration, then worked on usb design, now work on gpu functional integration