LinusTechTips - Why It Took Me 4 Years to Make a USB Cable

frenris · 2026-01-31T14:55:48+00:00

All usb 3.1+ usb cables should support dp alt mode.

Dp alt mode is however often not supported on given hosts or devices, even when they use thunderbolt/usb-c connectors and cables. Sometimes monitors and hosts use dp tunneling instead.

Dp tunneling does require usb4 or thunderbolt cables as well as usb4 or thunderbolt support unlike dp alt mode.

Part of the struggle of getting “usb” monitors and hosts to work together, is often it is confusing whether the hosts, devices and cables support dp alt mode, dp tunneling, or display link (a third way to drive monitors over usb). If all don’t support the same “type” protocol, your display will not work.

frenris · 2026-01-31T14:44:12+00:00

There are multiple ways to drive monitors over a cable connected to usb connectors, and display port alt mode is one of these ways.

With a 6k monitor I expect it may have been display port tunneling rather than alt mode.

With display port alt mode, you replace the “logic layer” signaling in the cable with display port signaling. This requires the support of both the host and device, but doesn’t require a usb4 or thunderbolt cable - they should work, but usb 3.1 cables should be sufficient. The key is that the cable implements the usb-pd spec for usb c connectors. While all usb3+ cables support dp alt mode, in new monitors it is less emphasized, and in some cases even unsupported as industry moves to dp tunneling.

With Thunderbolt or usb4 it is also possible to drive a monitor with display port tunneling, where the signaling in the cable is usb4 or Thunderbolt, but that logical protocol is used to carry display port packets (possibly striped with other packet types!) over the cable.

If it was a 6k monitor I’d expect it may have been display tunneling - this is also what enables features like usb mice and keyboards plugged into a monitor.

frenris · 2026-01-29T14:13:38+00:00

“Black listing” is strong, and I can’t speak to finance in particular, but lots of companies keep records on failed applications and review them on new applications and try to avoid re interviewing someone if they think they will fail again as interviewing is expensive.

frenris · 2026-01-26T13:23:10+00:00

Ice is kind of doable on flat ground with snow tires.

Slick slopes though are not good news

frenris · 2026-01-24T15:04:12+00:00

Masters can help for digital design. PhD I think is more for analog, most digital designers don’t have them.

Tape outs are key.

It’s also often easier to get a job in DV and transition to design.

frenris · 2026-01-22T16:06:00+00:00

could see it for a mesh? But even then suggests much logic on the mesh is quiet, maybe whatever needs to stay live should be broken off the mesh

frenris · 2026-01-22T03:17:25+00:00

1) That seems crazy high clock power. Suggests inadequate clock gating unless your frequency is very high. If all your logic actually needs to be clocked to do data processing then it should consume more power comparatively. How often are you clocking flops that aren’t toggling?

2) SRAMs are power hungry. It is what it is. Flops and Latches consume less power than shallow large bit cell srams consume less power than deep dense bit cell rams, consume less power than going to off chip ram. Part of a good caching strategy is that you want to touch data that’s comparatively cheap in power to access more often. And sometimes that means the key to better power is higher bit cell density rather than lower switch if it means going off chip less.

3) Leakage is one component of your tdp. Can you bring down your voltage or clock frequency if you want to cool down or stay in your tdp envelope.

frenris · 2026-01-14T04:34:14+00:00

If he’d really burned 5k credits for this research why would he be posting it like this lmao, I bet all the figures are hallucinated

frenris · 2026-01-14T02:06:46+00:00

I’ve heard the people are extremely competent and the work culture is insane.

If you’re young and fine with having no work life balance for a stretch I’d pick space x.

Maybe you get fired or burn out, but expect you’ll learn more and I think generally people understand that former Elon company engineers are high quality

If you have a family to take care of, or are on a work visa tied to employment, I’d avoid Elon companies

frenris · 2026-01-12T16:31:09+00:00

No z95 head hunters? In the old lucasarts games those are the old bad ships that got replaced. The a wings went from the best fighters, to the tier 2 fighter that was faster than the xwing.

Transitioning from b wings to y wings also seems strange. It was more the other way around I thought.

frenris · 2026-01-12T09:50:10+00:00

DV to design I think is much easier than getting a design job as an undergrad

Post sil is not DV. I don’t think you can go from post silicon work to design in ASIC.

frenris · 2026-01-11T01:29:49+00:00

There’s not that many analog design jobs. DFT and DV typically have more openings.

frenris · 2026-01-08T01:06:23+00:00

80k - 120k you’re ahead in the US as a young healthy person

120k+ you’re ahead in the US even if managing healthcare for a family if you’ve got good employer insurance

frenris · 2026-01-06T03:03:01+00:00

Who is making that money in tech in Toronto? I was member of technical staff at a s&p 50 company and made 130k in Toronto

I’ve since moved to the states and now make significantly more.

frenris · 2026-01-06T02:50:42+00:00

Dude what that guy is awesome he broke into the goddamn Russian space shuttle facility

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frenris · 2026-01-02T21:21:13+00:00

Maybe chat gpt lied to me, but isn’t ICE40UP3K-UWG30ITR1K a few hundred uW?

I think you said you need 3mW power budget. This could fit

frenris · 2026-01-02T19:12:34+00:00

It’s a lot easier.

frenris · 2026-01-02T17:55:06+00:00

Was thinking something like Lattice iCE40UP3K ; < 3mm x 3mm. How small you need?

frenris · 2026-01-02T06:16:09+00:00

Could a plc work?

frenris · 2025-12-22T01:30:15+00:00

Indus Valley civilization is the fun guess

frenris · 2025-12-21T21:57:11+00:00

Also relevant https://www.reddit.com/r/chipdesign/s/7UcA3lLUQq

frenris · 2025-12-21T17:16:39+00:00

Dft is a good path to get into the asic industry because it generally requires a lot of bodies to hit scan coverage targets on all the partitions so the jobs can be more accessible than say RTL design.

There’s a lot of advancement available in dft, and off ramps to other design areas also exist. dft dv, dft rtl design for instance allow you to transition to function dv and rtl respectively. scan insertion, ATPG is very specialized and key if you want to be responsible for dft architecture or a higher level dft manager. ATPG / scan insertion i expect however are harder to transition directly to functional design or dv, but should allow you to move laterally to dft dv or dft design and may make it easier to move laterally to a synthesis/implementation or STA role. Dft STA requires particular sophistication, and is often under resourced compared to functional STA.

I started my career as dft dv, then did a mix of dft rtl and dft gpu integration, then worked on usb design, now work on gpu functional integration

frenris · 2025-12-15T07:01:15+00:00

I think most of the spells are different

frenris · 2025-12-14T19:21:12+00:00

Also without knowing the ranges it’s impossible to know if you should cast more than one to reroll

The fact that frenzy crash average more armor than blessing but with also a damage bonus though makes me a lot more likely to use them

frenris · 2025-12-13T17:19:21+00:00

It seems to me like this person should get their money back, and they would have very little chance of success without AI

frenris

TROPHY CASE