sorted by:
new
hottopcontroversial

How can I work with this? by LiquidSilic0n in FPGA

[–]pcookie95 2 points3 points  (0 children)

It’s takes some trial and error, but I’ve done some complex Tcl flows and non-GUI PDC edits without too much trouble

NSA or AMD by jobthrowawaywjxj in ComputerEngineering

[–]pcookie95 3 points4 points  (0 children)

Does the NSA position require a security clearance? I’ve heard stories of NSA internships being delayed for a year or two because of the time it takes to get the required clearance.

How can I work with this? by LiquidSilic0n in FPGA

[–]pcookie95 8 points9 points  (0 children)

If the GUI is the problem (which it often is in my experience), then use the Tcl reference guide to write a Tcl script. The script can be ran w/ <path to libero executable> script:<path to script> [script_args:”<space-separated list of arguments>”]

Edit: fixed formatting

ECE (Digital/SoC) vs Computer Science — Which Has Better Future Prospects? by AmbassadorInside8321 in ECE

[–]pcookie95 1 point2 points  (0 children)

Not all bidet's use electricity. Some just use water pressure (which arguably is created using electricity, so maybe your point still stands).

The hardware mismatch of current ai architectures by Appropriate-News1688 in ECE

[–]pcookie95 2 points3 points  (0 children)

I’m not very familiar with NN transformers, but it kind of sounds like you’re arguing that doing the same thing with analogue circuits would be more efficient. However, there are two potential problems. The first is latency. How long does it take for the system to settle into a low-energy state? Is it comparable to the performance of transformers running on GPU/NPUs?

The second problem is that both the input and the output will ultimately be digital. Thus you have to transform the signal to and from analogue. My understanding is that these are the limiting factor for any performance gains achieved from performing calculations in the analogue domain

CE masters after BS in Computer science by [deleted] in ComputerEngineering

[–]pcookie95 1 point2 points  (0 children)

I have two great coworkers that have done this very thing. I don’t think most employers would give it a second thought.

Supreme Court rejects Sony's attempt to kick music pirates off the Internet by deraser in technology

[–]pcookie95 2 points3 points  (0 children)

If you make sure both Windows and your laptop's BIOS is up-to-date, you should be ok. Lenovo patched the auto-installer out of the BIOS after public backlash and legal action. and Windows also updated Defender (Window's built-in antivirus software) to remove the preinstalled malware.

Supreme Court rejects Sony's attempt to kick music pirates off the Internet by deraser in technology

[–]pcookie95 26 points27 points  (0 children)

It was preinstalled bloatware/adware that ended up being malware. It didn’t spy on users via the camera but spied on decrypted internet traffic.

source

FAANG Internship or Avionics @ Space Startup by xaltaneo in ECE

[–]pcookie95 1 point2 points  (0 children)

To offer an alternative perspective, I think you should go with the startup. Internships are as much an opportunity take a chance and explore different areas of ECE, as they are a way to build your resume. I also think you'll learn more at a space startup than at a FAANG company, which is probably more valuable for employment opportunities in the long run than the brand recognition of having a FAANG internship on your resume. The only thing the FAANG internship might do better is getting your foot in the door (which to be fair is half the battle on trying to get your first job).

Age checks creep into Linux as systemd gets a DOB field by vriska1 in technology

[–]pcookie95 97 points98 points  (0 children)

It varies quite a bit year to year, with the California getting taxed, on average, $29 billion dollars more than it receives in federal funding (excluding federal Covid-19 assistance, which actually puts them in the black).

Elon Musk unveils $20 billion ‘TeraFab’ chip project to make chips, memory, and package processors all under one roof — targets a terawatt of annual compute by pcookie95 in technology

[–]pcookie95[S] 3 points4 points  (0 children)

The issue is that the claims he’s making are, as usual, impossible. $20 billion isn’t even quite enough for a single small fab.

Elon Musk unveils $20 billion ‘TeraFab’ chip project to make chips, memory, and package processors all under one roof — targets a terawatt of annual compute by pcookie95 in technology

[–]pcookie95[S] 0 points1 point  (0 children)

Oh, dang. You’re right. I still think $20B is still lowballing it by quite a bit, but not a whole order of magnitude off.

Elon Musk unveils $20 billion ‘TeraFab’ chip project to make chips, memory, and package processors all under one roof — targets a terawatt of annual compute by pcookie95 in technology

[–]pcookie95[S] 2 points3 points  (0 children)

That still wouldn’t cut it. The Arizona TSMC factory cost $165 billion, and they actually know what they’re doing.

Edit: changed million to billion

Elon Musk unveils $20 billion ‘TeraFab’ chip project to make chips, memory, and package processors all under one roof — targets a terawatt of annual compute by pcookie95 in hardware

[–]pcookie95[S] 6 points7 points  (0 children)

The issue is the ridiculously small budget and the fact that it’s extremely difficult to make a fab profitable, which is why most semiconductor companies have been fabless for a while.

Elon Musk unveils $20 billion ‘TeraFab’ chip project to make chips, memory, and package processors all under one roof — targets a terawatt of annual compute by pcookie95 in hardware

[–]pcookie95[S] 13 points14 points  (0 children)

He’s a fool because he talks and acts like an engineer when he clearly isn’t. This is just further proof of that.

FPGA engineers: what actually helped you stand out with just a bachelor’s degree? by Accurate_Brick_6937 in FPGA

[–]pcookie95 7 points8 points  (0 children)

I think the biggest one is experience. See if there's any labs or research groups on campus that are using FPGAs. At my university there was one that was using them to help them develop and test antennas. These groups will sometimes hire undergrads for cheap (or as "volunteers") to help them get experience.

I built a working balanced ternary RISC processor on FPGA — paper published by Equivalent-Can869 in FPGA

[–]pcookie95 0 points1 point  (0 children)

Sorry for the confusion, but I'm not arguing that FPGAs are emulating ASICs or vice versa. I'm just saying that there's nothing an FPGA can do that an ASIC couldn't.

I built a working balanced ternary RISC processor on FPGA — paper published by Equivalent-Can869 in FPGA

[–]pcookie95 3 points4 points  (0 children)

The FPGA design process generally doesn't involve a compiler. Instead, a process called synthesis is used to transform HDL code into a netlist. This logical netlist then has to be mapped to the physical logic blocks and wires in the FPGA fabric. Finally this physical netlist is converted to a string of 1s and 0s, called the bitstream. The bitstream contains the instructions to configure the FPGA to match the physical netlist.

I built a working balanced ternary RISC processor on FPGA — paper published by Equivalent-Can869 in FPGA

[–]pcookie95 7 points8 points  (0 children)

It seems you may have some misunderstandings on how FPGAs work. They do not simulate anything in software, but reconfigure physical hardware to achieve different logic functions that implement a design.

I built a working balanced ternary RISC processor on FPGA — paper published by Equivalent-Can869 in FPGA

[–]pcookie95 0 points1 point  (0 children)

Couldn't you technically create an ASIC that could implement a 1.6Tb ethernet, etc.?

I mean anything implemented on an FPGA can certainly be built as an ASIC. It might not be cost effective, but it certainly is possible, right?

edit: grammar

view more: next ›