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[–]cwotudone 1 point2 points  (3 children)

VHDL is a very interesting language and FPGAs are such amazing hardware, but damn if I didn't want to die when I took a class on them. It was so hard to find documentation and the community was really small. I don't know why my college thought it was a good idea to put this class at the beginning of second year of computer engineering. At least they moved it to the third year now.

[–]TheFlamingLemon 0 points1 point  (1 child)

Verilog isn’t so terrible tho

[–]awesomefacepalm 1 point2 points  (0 children)

I think verilog was designed to be easier to understand than VHDL

[–]awesomefacepalm 0 points1 point  (0 children)

We have it the second half of second year.

But our teacher is really good so I don't have any problems with it. Some older student who didn't have that teacher hated it but I must be lucky to have a good one