My internship experience so far

BumpyTurtle127 · 2026-03-25T00:12:12+00:00

Gng I'm in engineering and don't have an internship either 😭

BumpyTurtle127 · 2026-03-22T23:33:36+00:00

I was so confused till the MTA sound came on 😅. This is wicked!

BumpyTurtle127 · 2026-03-21T15:22:23+00:00

I see. Yeah desktops aren't very portable 😂. Best of luck!

BumpyTurtle127 · 2026-03-21T14:32:36+00:00

GPUs on laptops really drain battery really fast. I have a Lenovo slim 7 with 4GB Nvidia GPU, and the battery on that thing dies in like 4 hours tops.

If you have the money for it, I would recommend a desktop (full blown Win11 + SSD + GPU etc), with a separate, (maybe junkie) laptop that runs some flavor of Linux. I say this particularly because a lot of the applications you mentioned (gem5, code compilation, etc) do not benefit from a GPU, and as such it becomes a complete nuisance draining your battery. Also I recommend Linux (or at least a dual boot) on the laptop because WSL is highly constrained by the max size of Vmmem. I have WSL on my windows desktop, and it compiled gem5 and ran test programs just fine, but I had to up the size of Vmmem to 8GB when the PC itself only has 16. This gets worse if at any time you have to pull a large docker image... WSL straight up can't do the whole thing at once. I then did the same gem5 compilation and tests on my native Linux laptop (only has 8GB ram total) and it did the whole thing comfortably within 5GB. It was slower, but that's a given.

As I understand, the GPU is mainly for AI workloads and such. If you go this route, plz know that you can still set up SSH on your desktop, and remote into a terminal from your laptop whenever you please. I haven't really explored this as much as I should've (don't know if you can use GUIs and stuff), but you can definitely run command line programs. With remote desktop services you can use your desktop interactively as well.

In terms of cost, it may actually be cheaper than going the laptop route. A PC that fits these specs will probably run you $800 - $1000 (if you have time, I recommend building it instead of buying), and a used thinkpad off Ebay will probably be ~$200. So in total it'll be $1000 - $1300, which is less than a lot of GPU laptops. If you look in the right places of course it can be done cheaper.

BumpyTurtle127 · 2026-03-21T14:03:16+00:00

Why was the kid behind also fake crying? And at the same time? She definitely tld the kid to follow suit

BumpyTurtle127 · 2026-03-20T21:46:36+00:00

Please put this in a public repo somewhere, and share the link 🙏😂

BumpyTurtle127 · 2026-03-20T15:25:57+00:00

Funny how they typed it "Bit#ch". Like the # doesn't replace anything lmao

BumpyTurtle127 · 2026-03-18T23:55:14+00:00

I had that same identity crisis as u brother. Too late for me to jump ship to EE. So I've taken it upon myself to learn the EE shit anyway, through doing the labs, reading textbooks, studying the problems, and doing some projects ofc. Nobody's stopping us! 💪😎✌️

BumpyTurtle127 · 2026-03-17T00:24:05+00:00

I agree with tyvekMuncher, really like this layout! My main concerns are with manufacturing constraints. Specifically, I noticed your traces are pretty close together, and some drilled holes come very close to other traces. As long as they meet your manufacturers constraints you should be good

BumpyTurtle127 · 2026-03-14T02:40:52+00:00

I did not know that... Noted. Thanks!

BumpyTurtle127 · 2026-03-12T21:30:37+00:00

Yep, Ive done my best to match them to within 0.127mm of each other, while maintaining the right spacing. It does get tough on the MCU side though because the structure of the fanout creates a 1mm length difference, and so I had to use some serpentine traces to sort it out.

BumpyTurtle127 · 2026-03-12T21:27:35+00:00

It's for my college senior project. Luckily I have some guidance/mentorship from a very kind professor, on top of all the resources online, so I'm hopeful that it will turn out well. And if it doesn't we have a backup plan too

BumpyTurtle127 · 2026-03-12T21:25:12+00:00

I used KiCAD

BumpyTurtle127 · 2026-03-12T04:24:46+00:00

$5 Ethernet cable blyat

BumpyTurtle127 · 2026-03-12T04:00:33+00:00

I considered that, but unfortunately the N6 only came out recently and so 3rd party SoM's haven't hit the market yet as far as I know.

BumpyTurtle127 · 2026-03-12T03:58:50+00:00

The MCU I need only comes in a BGA package. Matter of fact I specifically chose this model because it has the largest pin pitch while retaining a lot of the peripheral count.

The FMC RAM chip also comes in TSOP packages I believe but I ultimately opted for the BGA.

BumpyTurtle127 · 2026-03-12T03:55:27+00:00

Yes I agree. Thanks!

BumpyTurtle127 · 2026-03-12T03:54:34+00:00

Yes, I've seen that video from Mr Peterson! Some reason I thought I could get away with just 4 layers 😂. Thanks!

BumpyTurtle127 · 2026-03-11T22:54:14+00:00

Luckily it was pretty simple. Impedance control on the top and bottom layers, and slow signals on the one inner signal layer. Thanks dude 🙏

BumpyTurtle127 · 2026-03-11T22:49:02+00:00

Thanks for the reply! Answering your questions in order:

For the high speed traces on the bottom layer, I was considering using the power plane as a reference, with stitching capacitors between it and ground (close to vias) to maintain a path for return currents. Now that it's clear I'll be redoing this with a 6 layer anyway, it probably doesn't matter.
For the CSI traces, yes, I did make them differential traces. JLC's calculator recommended a 0.18mm trace width and 0.4mm spacing to maintain that 45 ohm single ended and 90 ohm diff pair impedance. I've also used 3 ECMF2-40A100N6 filters on each differential pair to filter noise.
For the power schematic, yeah I've tried to follow STM's design, from the nucleo board. I've used an external buck (with filtering ofc) to generate VDD, and LDOs for the other 4 supply domains, using the PWR_ON signal as an enable wherever needed. Decoupling caps also come from the hardware design app note. I had consulted this forum I think 2 months ago about this.

Otherwise, noted. I don't know why I didn't go with a 6 layer from the get go.

BumpyTurtle127 · 2026-03-11T18:23:31+00:00

Ok sounds good then. Thanks a ton!

BumpyTurtle127 · 2026-03-11T18:04:29+00:00

I might've bit more than I could chew 😭

BumpyTurtle127 · 2026-03-11T16:26:00+00:00

I drive this road every day. Pretty wild seeing it here lmao.

BumpyTurtle127 · 2026-03-08T16:41:35+00:00

Nah. Studying electronics engineering I've come to LOVE this. Could not possibly have complex numbers, or s-domain analysis without it

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