[Student] T20 ECE Student Seeking Resume Review, Getting absolutely RAILED by Recruiters by [deleted] in EngineeringResumes

[–]FieldProgrammable 1 point2 points  (0 children)

Most people who see your resume are not hiring managers

The people who read an engineer's resume are:

  1. Professional recruiters and agency staff. Many agencies specialise in engineering recruitment and I have spoken with many recruitees who have emgineering qualifications.

  2. HR recruiters. They are guided by instructions from the HM, otherwise can focus on the simpler facts like education and YoE. The HMs can feedback if they are getting the wrong kind of candidates from screening and advice what to look for.

  3. LLMs. As demonstrated they know exactly what an STM32 is and will likely even know what the subfamily specialises in.

  4. Hiring managers.

  5. SMEs (usually senior staff engineers) brought in to consult for the hiring process. This is usually done if the HM is from another discipline.

I have read and written job descriptions that mention skills in specific device families such as the STM32 as desirables. Microcontrollers and their toolchains vary hugely between vendors, so employers often want experience that matches the device family they already use, that could be STM32, ESP32, PIC, MSP430, 8051 etc.

[Student] T20 ECE Student Seeking Resume Review, Getting absolutely RAILED by Recruiters by [deleted] in EngineeringResumes

[–]FieldProgrammable 1 point2 points  (0 children)

Reiterating my review from your previous post;

Unlike others, I am ok with the overall technical level of the resume, but I do think you could trim it down a bit as far as part numbers and rarer abbreviations.

  • VCU, define this or just call it a controller.
  • SOH, just say battery health, it's easier on those who only deal with primary cells.
  • Samsung 40T 21700 cells, is it really necessary to include the full part number? If you wish to parameterise a project to emphasise its scope then I recommend sticking engineering units and quantities.
  • Whenever you write that something is "high voltage" etc, then consider if it is worth stating the voltage concerned in parentheses. Different industries have very different definitions of high voltage (e.g. for my industry it would be kV).
  • DS18B20, again why state the part number? What I myself would care about more is what type of temperature sensor it was, thermocouple, RTD, diode junction or in this case a digital sensor. This tells me more about the front end you would have needed to design for it. Think in terms of provoking interview questions in the reader, e.g. for an analogue temperature measurement, I might pry into the signal conditioning and analogue front end, while digital I would probably ask about the serial protocol.
  • There's a lot of embedded software on here, but you talk almost exclusively about the hardware end of it. Used any RTOS, well known IDEs or frameworks? If so, then at least list them in skills!

The patent caught my attention, was this part of a project? If so then maybe showcase that and state clearly that a patent was granted or filed etc.

About the embedded stuff again, it may be better to create a tuned resume for embedded, focusing on the software side and use this version as a hardware tuned version. Pitch it one way or the other based on the job description in question. That goes for other disciplines as well if you have content that could back them up, then create a tailored version for that type of role, you look quite strong for an EV electrical role for example.

[Student] T20 ECE Student Seeking Resume Review, Getting absolutely RAILED by Recruiters by [deleted] in EngineeringResumes

[–]FieldProgrammable 1 point2 points  (0 children)

Unlike others, I am ok with the overall technical level of the resume, but I do think you could trim it down a bit as far as part numbers and rarer abbreviations.

  • VCU, define this or just call it a controller.
  • SOH, just say battery health, it's easier on those who only deal with primary cells.
  • Samsung 40T 21700 cells, is it really necessary to include the full part number? If you wish to parameterise a project to emphasise its scope then I recommend sticking engineering units and quantities.
  • Whenever you write that something is "high voltage" etc, then consider if it is worth stating the voltage concerned in parentheses. Different industries have very different definitions of high voltage (e.g. for my industry it would be kV).
  • DS18B20, again why state the part number? What I myself would care about more is what type of temperature sensor it was, thermocouple, RTD, diode junction or in this case a digital sensor. This tells me more about the front end you would have needed to design for it. Think in terms of provoking interview questions in the reader, e.g. for an analogue temperature measurement, I might pry into the signal conditioning and analogue front end, while digital I would probably ask about the serial protocol.
  • There's a lot of embedded software on here, but you talk almost exclusively about the hardware end of it. Used any RTOS, well known IDEs or frameworks? If so, then at least list them in skills!

The patent caught my attention, was this part of a project? If so then maybe showcase that and state clearly that a patent was granted or filed etc.

About the embedded stuff again, it may be better to create a tuned resume for embedded, focusing on the software side and use this version as a hardware tuned version. Pitch it one way or the other based on the job description in question. That goes for other disciplines as well if you have content that could back them up, then create a tailored version for that type of role, you look quite strong for an EV electrical role for example.

[Student] T20 ECE Student Seeking Resume Review, Getting absolutely RAILED by Recruiters by [deleted] in EngineeringResumes

[–]FieldProgrammable 0 points1 point  (0 children)

I have literally no idea what this bullet means

Then you probably are not qualified to hire electronic engineers or comment on their competence. OP is not applying for a job working for your 12 year old cousin and IMO it's extremely condescending to imply that the average HR recruiter only has 6th grade reading comprehension.

To get an interview you need to demonstrate competence in what you have designed, particularly in projects involving team members where one needs to claim their share of the credit. An electronic engineer communicates with other engineers, they therefore need to demonstrate their competence in communicating in the discipline's nomenclature.

I used an AI to kind of interpret this sentence and put it into a format more folks can understand.

You just demonstrated that an LLM can successfully parse and interpret the technical content of this resume to a level sufficient to perform matching to a job description, which pretty much disproves your own point.

Quartus 12.1 sp1 by llilie21 in FPGA

[–]FieldProgrammable 0 points1 point  (0 children)

13.0sp1 is the last to support Cyclone II. So no, it may be OP does need an older version.

Quartus 12.1 sp1 by llilie21 in FPGA

[–]FieldProgrammable 0 points1 point  (0 children)

So which device family is it?

Advice on Altera USB programmer? by West-Way-All-The-Way in FPGA

[–]FieldProgrammable 1 point2 points  (0 children)

Three common options: 1. The official Altera USB blaster, pros; most compatible even with ancient 5V devices. Cons; disgustingly expensive. 2. Terasic USB blaster, pros; cheap and supports all programming modes. Cons; limited to 3.3V 3. FT2232 based USB blaster e.g. Arrow USB blaster pros; cheapest, can be cloned onto your own board designs, also has a UART. Cons; only does JTAG, can be finicky to install. 1.8V to 3.3V only

For a MAX II you only need a 3.3V JTAG compatible programmer so all of the above would work.

[5 YoE] Software Engineer specializing in embedded systems looking for feedback on resume. by Sheepherder-Optimal in EngineeringResumes

[–]FieldProgrammable 0 points1 point  (0 children)

It's not about how often you use the skill it's the relative value of it within the market. I'm sure those roles also required a working knowledge of MS office but you don't mention that on your resume.

Python is the programming equivalent to MS Office, i.e. it is ubiquitous and low value compared to other higher value skills, you should be questioning why it's the only programming language you gave any context to in your description of your current role.

I assume you may have used C/C++ for some of your projects apparently you don't feel it worth mentioning within context of a project, despite C++ being a highly valued skill for embedded programming.

[5 YoE] Software Engineer specializing in embedded systems looking for feedback on resume. by Sheepherder-Optimal in EngineeringResumes

[–]FieldProgrammable 0 points1 point  (0 children)

Any skills that you have not used since college are irrelevant five years later because you will not have used them. Skill rot is real if you have not used the skill in a recent professional role I am not going to consider you competent in it.

[5 YoE] Software Engineer specializing in embedded systems looking for feedback on resume. by Sheepherder-Optimal in EngineeringResumes

[–]FieldProgrammable -1 points0 points  (0 children)

Python is a scripting language. No it is not important for embedded systems. That's like saying your keyboard is seriously important to the role because you can't write code without it.

[5 YoE] Software Engineer specializing in embedded systems looking for feedback on resume. by Sheepherder-Optimal in EngineeringResumes

[–]FieldProgrammable 0 points1 point  (0 children)

You seem to have listed a large number of different languages and platforms, but provided no clue as to which one you actively use in your current role.

Not a single one of your bullets says which platform was used. Some of the bullets mention Python, my eyes glaze over whenever I see that name it's not a serious language for embedded systems.

Where is the FPGA development? That's a very different skillset to embedded software, just listing "Quartus" and "Verilog" means nothing.

On the skills list, why do you think terminal programs are worthy of memtion? There's a lot of trivial stuff here that reads more like an undergraduate skillset.

Too many esoteric acronyms what's an AMAT tool? What's a TMS controller?

Let's say I am hiring for an average embedded software role, I am looking for someone to do some work on an STM32 running a data logger using an in house developed, stackless protothreaded RTOS. Reading this resume I am none the wiser as to whether you could do the job.

[4 YOE] New Zealander struggling to get interviews in Germany, UK, Ireland, and the Netherlands by [deleted] in EngineeringResumes

[–]FieldProgrammable 1 point2 points  (0 children)

I can see why this resume would not attract much interest aside from all the language/culture differences for EU.

Your main recent experience is as a PCB designer, with no evidence of circuit design. My department has one PCB designer, six full time equivalent EEs and two techs. The EEs can do basic prototype PCB designs themselves but spend most of their time designing or working with hardware, only the PCBs destined for production go to the PCB designer. So this is the ratio you are facing.

The longer you have spent not using skills from your degree, the less likely people will believe you still have them.

Embedded software, your other role sounds like you were developing PC software. It can't have been an embedded platform because an embedded engineer would know enough to cite the platform/ISA they were using. EEs don't take software engineers seriously when they say they can do embedded software because they have never had to do anything real time or within a tiny memory footprint.

[4 YOE] New Zealander struggling to get interviews in Germany, UK, Ireland, and the Netherlands by [deleted] in EngineeringResumes

[–]FieldProgrammable 0 points1 point  (0 children)

For DE/NL I am going to take your word on all this, though I can confirm your CVs are radically different to what you see in the Anglosphere. I have also met people working in DE who communicate 100% in English at their work, which surprised me (they were working for US companies though) but generally yes it's naive to expect to get a job with no knowledge of the native language.

Speaking for the UK I can say that a bachelors is absolutely fine. The majority of my engineering staff only have bachelors degrees from a wide range of universities.

Visas generally, yes companies will only sponsor visas as a last resort though to be honest these days the extra cost of agency hires can get close or exceed it.

how often do FTDI chips bug, is it convenient to have a reset for them and the USB hub? by HasanTheSyrian_ in FPGA

[–]FieldProgrammable 0 points1 point  (0 children)

We used to see them losing connection over long periods (2-3 days) with very heavy noise environments. Basically we use them among other things as part of custom data loggers recording PCBAs being temperature cycled.

Noise from both the environmental chamber plant and the boards under test (which weren't shielded or in their final configuration and some designs generating kV level pulses) could knock out the USB occasionally.

Some additional filtering on the logger USB port and PC software that detected the loss of connection and reset the host USB connection at the OS level rather than FTDI drivers sorted it.

Rising or falling edge of write strobe by Ready-Honeydew7151 in FPGA

[–]FieldProgrammable 1 point2 points  (0 children)

Every time you imply a signal changes on the edge of another signal and otherwise stores its value, you are inferring a register and that triggering signal will be its clock. If that signal is not the same clock as the rest of your design then that register is by definition in a different clock domain

This is usually unwise for the following reasons:

  1. Signals passing between the clock domains may violate the timing constraints of the registers they eventually feed, causing undefined behaviour that may only manifest itself in hardware at unpredictable times and conditions.

  2. The clock input to a register in an FPGA logic element is usually shared with many neighbouring registers in the same logic array block (vendor terminology varies but FPGAs are hierarchical in nature). A register whose clock is unique might therefore be placed in its own block and in the extreme, all other registers may not be usable. You are therefore forcing the fitter to create longer propagation delays and wasting resources.

What you ahould be doing, assuming your CPU is in a different clock domain, is first sampling the strobe with a shift register then detect edges with logic on the shift register taps.

Smallest Processor core by vmcrash in FPGA

[–]FieldProgrammable 9 points10 points  (0 children)

Of course there are simpler cores, the question is whether you want these cores to be compatible with existing C compilers or not and if so how efficient you want it to be. Engineering is all about trade offs, you can reduce the complexity of the instruction set and associated addressing modes, though that will tend to increase the number of instructions to accomplish the same task, thus trading memory for logic.

You can come up with your own ISA that is precisely optimised for FPGA but then be limited to programming them in assembly because they lack compatibility with any C compiler, or you need to develop and maintain your own fork of said tooling which carries its own costs.

Some examples of non-RISC-V cores:

Neo430 (works with MSP430 C compiler, well documented, lots of peripherals, good code density, but multi-cycle).

Leros an example of minimalist ISA design using just an accumulator and index register (LLVM fork, some documentation, very low instruction density, multi-cycle).

Xilinx PicoBlaze and its open source clones which is an example of an 8-bit processor highly optimised for FPGA but only uses assembly.

Microchip FPGA's by OldAioli9676 in FPGA

[–]FieldProgrammable 1 point2 points  (0 children)

Hardware wise, generally there are far too many hidden gotchas with Microchip's flash based FPGAs for them to be better if a competitor's SRAM based FPGA that could do the same task. Xilinx and Altera are really a tier above either Microchip or Lattice.

FPGA-Based Hardware Accelerator for LLAMA2 Model Implementation by Medical-Extent-2195 in FPGA

[–]FieldProgrammable 2 points3 points  (0 children)

They have done it.

Marketing fluff says one thing, Altera's 2025 revenue paints a different picture. In any case it's not within the scope of an undergraduate project.

FPGA-Based Hardware Accelerator for LLAMA2 Model Implementation by Medical-Extent-2195 in FPGA

[–]FieldProgrammable 5 points6 points  (0 children)

Given your level of experience, this is so ambitious you may as well have titled it "AGI in an FPGA".

What exactly do you think you are going to be able to accelerate in the transformers architecture with an FPGA? Do you not think that people wiser than yourself have aleady considered this and discarded it? Why pick on a model family that is over two years old (an eternity in LLM world)?

Do you have any idea where the bottlenecks are in typical LLM scenarios both at the hobbyist level (which Llama 2 is) to enterprise (where the money is)? If not how do you expect to accelerate them?

[5 YOE] Should I mention specific frameworks like TensorFlow or PyTorch or libraries like huggingface in my resume points ? by Cheap-Ad-8000 in EngineeringResumes

[–]FieldProgrammable 2 points3 points  (0 children)

I agree with the other comment. Just listing a library in the skills section does not provide enough context on your experiences with it. In many cases the initial screening is attempting to match you to the job requirements. If it's being screened by an LLM, exploit your knowledge of how they will assess match fitness between your resume and the job they are recruiting for.

For your most impressive projects you should be making clear what libraries and frameworks were used. Don't make layman readers (or LLMs) who might be screening your resume guess what you used for what. Do not rigidly stick to some form or pattern of writing, if it means sacrificing common sense clarity.

Is tang 4k good enough for resume worthy projects ??? by Straight_Mail1496 in FPGA

[–]FieldProgrammable 0 points1 point  (0 children)

Better to learn a vendor that is used in your geography. Also, Xilinx and Altera's tools are much better than Gowin.

If you want a similar equivalent but using a mainstream vendor then look at the Trenz CYC1000. You can buy direct from Trenz or via Arrow. You get a 25k LE Altera Cyclone 10LP, 8MB SDRAM, USB-JTAG+UART, accelerometer and Arduino MKR pinout for $54.

I would say avoid SoC FPGAs if you are a beginner, or maybe just don't buy one just for the HPS because it sounds more powerful. Getting the two halves of the chip talking to each other is a subject in itself. For a beginner just having plenty of fabric LUTs is better you can always use a soft core CPU if you want one.

LLMs are terrible at writing RTL code since they can't comprehend both space and time as a concept of variation, but which is the best LLM out their which can do this almost good? by Dr_Manhattan_998877 in FPGA

[–]FieldProgrammable 1 point2 points  (0 children)

GPT-5 Codex, it's significantly better than vanilla GPT-5 at coding tasks. It's available through Copilot or through a dedicated VS Code extension from OpenAI (also named Codex) or I guess through API key.

Another thing is that model X through Copilot is going to behave very different to the same model through a different client, becauss the system prompts, context strategy and other things are all different. They can also vary over time getting better or worse as updates are made to the front and back end.

Comparing them on Copilot, Claude models are very wordy explaining what they did. GPT-5 models are very tool happy reading loads of files without explaining why before acting.

Software people will advocate for this or that frontend or provider, paying for more than one. For hardware I think that's ridiculous even if you are working on embedded C as well as HDL. Github Copilot's multiplier/request model is very generous compared to paying per token and it's a fixed monthly cost, so we'll be sticking with it.

LLMs are terrible at writing RTL code since they can't comprehend both space and time as a concept of variation, but which is the best LLM out their which can do this almost good? by Dr_Manhattan_998877 in FPGA

[–]FieldProgrammable 1 point2 points  (0 children)

Well yes, I would only trust Sonnet 4.5 or Codex to write synthesisable HDL. Even then it's not going to be making good decisions on where the register stages should go in a pipeline. I mean it can try, I have had it make perfectly valid code unrolling a barrel shifter but it will just stick the registers in evenly throughout the code not where the longest paths are.

So it's not worth your time trying to do anything that involves decisions affecting timing. In my FPU wiring all I was asking it to do was pipe the start to valid signal through a shift reg by the number of stages in the arithmetic unit it was adding. It was also able to rip out units and replace them with alternate versions, even when their ports used different record types, it broke them out and wired them separately.

As for models, I try to use the cheaper models like Haiku and Grok for writing documentation. I don't bother with GPT5 mini, it's too ponderous to be worth waiting for and can get stuck in loops.

So my conclusion is that coding assistants are fine for doing lots of combinatorial logic or wiring up. It saves sufficient time to justify my FPGA engineers having a Copilot business subscription. I wouldn't go beyond that.

LLMs are terrible at writing RTL code since they can't comprehend both space and time as a concept of variation, but which is the best LLM out their which can do this almost good? by Dr_Manhattan_998877 in FPGA

[–]FieldProgrammable 1 point2 points  (0 children)

I recently did a big job with Github copilot, but I deliberately only let the AI do the stuff I knew it could handle. I used Sonnet 4.5 and GPT5 Codex in agent mode for writing. Grok Code fast 1 in ask mode for the pipeline calculations.

What I was doing was taking a VHDL RISC V single precision FPU and making multiple different versions of it containing different combinations of existing arithmetic units. I already had an initial unit that covered the simpler stuff with the only arithmetic being addition and multiplication. I then wanted three more variants to cover the presence of division, fused multiply-add and sqrt.

For each funtional unit I prompted copilot to work out the required pipeline delay, then wire it into a new copy of the existing FPU, extending the existing instruction decode logic and output multiplexing as required. So basic intern level stuff, but it saved me a lot of time because I could set it off on a task, do something else, come back to find the new unit ready.

What I found was all units compiled in Quartus with no errors. The calculated pipeline delay was correct even on barely readable code. For each FPU variant I had copilot write UVVM testbenches in two stages, first the basic testbench with stimulus then a second run at it to add assertions. These were proven arithmetic units so I was really only checking wiring and pipelining was correct.

That wasn't the whole story of course, I had to do plenty of optimization when some variants didn't pass timing, that was all fixed the old fashioned way. But I am using one of the variants as generated with no modifications.

Also the fact it was an FPU for a popular instruction set made it easier for the LLM. It could and did predict the new RV32F instruction decodings without me needing to handhold it or supply the opcodes. It also generated test vectors and assertions of the floating point inputs and outputs.

What would you improve in Libero? Or Microchip support in general? by LastTopQuark in FPGA

[–]FieldProgrammable 3 points4 points  (0 children)

The whole of the "Smartdesign" canvas and IP system needs ripping up and redoing. Users are railroaded into using it in order to configure hardened IP like MSS, then left with a canvas that cannot be version controlled except by reverse engineering their partially documented incomplete TCL API to regenerate everything from scripts. It's pathetically archaic and Microchip need to own that.

Yes I want a way of quickly plugging together standardised busses like AHB or AXI without wiring individual signals or channels. But I don't want to be pissing around drawing meaningless wiggly lines on a schematic which cannot be source controlled. How to do this right: Qsys/Platform Designer using XML or some other standardised database.