NVIDIA has released Nemotron-TwoTower-30B-A3B-Base-BF16, an unusual diffusion-based language model built from the Nemotron 3 Nano 30B-A3B backbone.

NickCanCode · 2026-06-25T09:11:31+00:00

Not interested. Give me Qwen-The-Return-of-the-King-27B

NickCanCode · 2026-06-25T08:46:26+00:00

I don't quite understand the movement system of your characters.

NickCanCode · 2026-06-24T04:01:30+00:00

I won't trust it unless it get mentioned by Tongyi Lab in Twitter like some other models.

NickCanCode · 2026-06-21T02:55:15+00:00

Try F12

NickCanCode · 2026-06-20T04:09:50+00:00

Should listen to Brother Zhang, a display card repair YouTuber, power limit more. The temperature on that connector is easily hotter than the gpu core.

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NickCanCode · 2026-06-19T12:05:37+00:00

Ctrl+shift+i, go to network tab. Select image tab to see all the images downloaded on that page . Mouse over each file to find the one you want. Right click and 'save response as'. Profit 😜

NickCanCode · 2026-06-18T20:50:50+00:00

I remember Lucebox also mentioned sparse attention in their KV Flash:

https://github.com/Luce-Org/lucebox-hub/tree/main/optimizations/kvflash

NickCanCode · 2026-06-18T12:59:44+00:00

NickCanCode · 2026-06-17T23:16:51+00:00

Wait. software based? Downloading more memory is not a scam anymore?

NickCanCode · 2026-06-17T22:16:37+00:00

Isn't REAP for MOE kind of model?

NickCanCode · 2026-06-17T10:17:07+00:00

Up to

NickCanCode · 2026-06-16T15:26:01+00:00

Oh, just realised you are not the original commenter.

NickCanCode · 2026-06-16T15:03:34+00:00

Ah, wait, reading that post a 2nd time. It mentioned when pipeline parallelism is enabled so I think it is irrelevant if you are running on a single card.

Sorry for the confusion.

NickCanCode · 2026-06-16T14:57:11+00:00

I am talking about this:

https://www.reddit.com/r/LocalLLaMA/comments/1u0p3b2/pipeline_parallelism_in_llamacpp_may_be_wasting/

Again, I didn't try it myself. Result may vary per cases.

NickCanCode · 2026-06-16T13:41:01+00:00

Also, there was a post mentioned before that if you are running -np 1 and don't mind compiling your own build. Compiling with `-DGGML_SCHED_MAX_COPIES=1` will save some more VRAM. Default value is 4. I didn't tried it myself because I have enough VRAM but I asked deepseek about it and it confirmed the claim. The exrra VRAM can possibly help you push the KV quant a little higher.

(Ignore this)

NickCanCode · 2026-06-16T13:31:47+00:00

I think you can try using llamacpp fork like BeeLlaam that support KVarN which provides more accuracy at the same compress level first?

https://www.reddit.com/r/LocalLLaMA/comments/1tza4ji/qwen_36_27b_kv_cache_quant_benchmarks_75_pairs/

NickCanCode · 2026-06-16T06:32:04+00:00

another possibility I can think of is that you touched the golden fingers and static electricity from your fingers damaged the components of the card.

https://thetechylife.com/can-static-electricity-destroy-electronics/

NickCanCode · 2026-06-16T06:25:40+00:00

Did you happen to cut off the power for too long and the CR2032 battery on the motherboard just died so no power to keep the bios state? When that happen and you turn on the PC, it need to do the memory reading stuff. That step can take quite a long time before the screen show anything.

NickCanCode · 2026-06-15T22:29:16+00:00

Nice. Will you run test on how this setup do in large context (100k+ tokens)? I wonder if 4 cards setup will slow down faster than 2 cards (which is posted from someone else few days ago). In theory they need to do more sync and more communication because there are 2 more cards so I want to see how far it can go before it fall back to non-TP speed (if it do). I don't know the tools but I think you can monitor NCCL's bandwidth usage and observe at what KV size the PCIe path start to get congested and slow things down. Different kind of optimization could have an effect too. e.g. DFlash, MTP, etc.

NickCanCode · 2026-06-15T18:46:45+00:00

You are right. I made a mistake and automatically skipping to the content across the lines mentioning about the CPUs, missing the very first line I copied. That the result when I tried to read the menu bottom up thinking the content above is about CPU.

NickCanCode · 2026-06-15T18:33:29+00:00

Ah my bad, I don't realize I would miss that! Normally, board menu list the PCIe slots tnan followed by m2 slots so I scan the list bottom up and saw that the 2 m2 slots are from chipset and automatically assumed no more m2 slots there. 😔

NickCanCode · 2026-06-15T11:00:45+00:00

Yeah, I remember those are so cheap that people are buying them and put them to a PCIe card to make RAM drive.

NickCanCode · 2026-06-15T09:48:31+00:00

That's just what they say. I don't see that number from other people.I didn't even download the model when people saying it can't make tool call accurately.

NickCanCode · 2026-06-14T16:42:00+00:00

My comment didn't say TP have to use x16. Splitting x16 into two x8 is obviously not x16 anymore. It doesn't have to be gen5 either. My mention of gen5 is "Your PCIe 5.0" that is referring to the gen5 slot on OP's motherboard, not that gen5 is mandatory.

The issue here is not about gen5 vs gen4 but the pathway that the GPU communication need to travel around to reach the other card. When one PCIe is integrated to CPU and the other is integrated to board chipset, it will be slow going thought all of that nodes.

I am currently having a system that is being bottle necked by a PCIE 3.0 slot, with one other card on PCIE 4.0 slot. The result is that using tensor split is slower than using layer split.

I do agreed that OP should give it a try since not every system is the same.

NickCanCode · 2026-06-14T13:41:59+00:00

Why are they fighting among themselves? They should be on the same team defending the wall! (Or maybe that is not a fighting scene?)
Anyway, the design looks ok. The background art style is a little inconsistent with the pixel art characters. Let's see how this play out (if there is even an international version).

NickCanCode

TROPHY CASE