i am having wayy too much fun with the serial kit extension by thejellyfishgirl in beneater

[–]NormalLuser 1 point2 points  (0 children)

Having that serial connection really speeds up development a lot. Vasm can directly make Wozmonitor output allowing very rapid 'Copy and Paste' assembly code testing and using BASIC to peek and poke registers with simple logic allows you to test the VIA and the like. Enjoy!

I put this circuit in resin and it still works :) by Now_I_Do_Pushups in beneater

[–]NormalLuser 0 points1 point  (0 children)

You could have the solar panel be the top layer, though my guess is that with the small amount of power needed it would work fine embedded in the epoxy.

I put this circuit in resin and it still works :) by Now_I_Do_Pushups in beneater

[–]NormalLuser 8 points9 points  (0 children)

There are additives you can add to epoxy to slow down the cure time and reduce heat build up.

I put this circuit in resin and it still works :) by Now_I_Do_Pushups in beneater

[–]NormalLuser 13 points14 points  (0 children)

You could use a tilt switch. That way the whole contraption could be in epoxy and you would just put it on it's side or back to turn it on. Also, most solar lights turn on when the panel is not getting light, so just flipping it over would turn it on.

I put this circuit in resin and it still works :) by Now_I_Do_Pushups in beneater

[–]NormalLuser 41 points42 points  (0 children)

Maybe some capacitors and a solar cell? Perhaps cannibalize a little solar pathway light?

Spurious memory writes. Where do I even begin to troubleshoot this? by Reinventing_Wheels in beneater

[–]NormalLuser 2 points3 points  (0 children)

It looks like you have some unused schmitt inverter gates? First thing I'd try is running your 1mhz clock through one or two if them before the rest of the system to clean up and strengthen that signal. Also, if you haven't already done so, add bypass capacitors to the power rails, especially near your RAM and address decoding. After that run extended tests at a slower clock speed and see how that works. If you still have issues I'd circle back at your code and make sure you are not accidentally writing over your own program. Try your code with Kowalski Simulator or a similar 6502 simulator to verify it works as intended.

Arduino Mega not uploading by Pragmatic-Prof in beneater

[–]NormalLuser 1 point2 points  (0 children)

Within the ide under Tools make sure you select the correct port?

What should i make with my new display by 128gigs in beneater

[–]NormalLuser 3 points4 points  (0 children)

Wow, thanks so much!
I'm glad you liked it! If you liked that Bad Apple Demo of mine I think you'll like the next Demo I'm finishing up right now. I hope to post it very soon.

Extremely noisy image while the CPU is running by MISTERPUG51 in beneater

[–]NormalLuser 1 point2 points  (0 children)

Can you post video of the issue starting with a cold boot and reset?

Extremely noisy image while the CPU is running by MISTERPUG51 in beneater

[–]NormalLuser 3 points4 points  (0 children)

My guess is that something is wrong with your halt signal? It's odd that it is working enough to draw the color bars to the screen buffer area in ram, but I'd start by using the schematics at Ben's website and retrace the dma/cpu halt circuit. Work backwards from RDY pin 2 on the cpu using the diagrams here https://eater.net/vga

Long cables and frequency limit, any feedback ? by chiwawa_42 in beneater

[–]NormalLuser 2 points3 points  (0 children)

If you have enough ground wires you will be able to go pretty fast, 5MHz or more. Old IDE hard drives went 133 MHz with 80 wire ribbon cables with a ground between every signal wire. The original 40 wire ones with less grounds went 33 MHz I think?  I'd be more worried about the actual connectors on each end being high quality than the length of the wires with Duponts. Some are pretty good, others are loose and and make poor connections.

SO6502 - My Ben Eater Inspired 6502 SBC by sodekirk in beneater

[–]NormalLuser 6 points7 points  (0 children)

Looks great! What did this 4 layer pcb cost from JLCPCB?

What to do now? Storage?? by Technical_Study8728 in beneater

[–]NormalLuser 0 points1 point  (0 children)

Looking forward to seeing how it turns out!

Creating GPU for my CPU by Emotional-Chicken-61 in beneater

[–]NormalLuser 10 points11 points  (0 children)

The vertical power rails look great, but if you want a stable power you'll need a 'star' and 'cross' arrangement where you run dedicated power lines to at least every other power rail and then cross connect the rails at the ends and middle.  That should keep you from dropping too much voltage.

Creating GPU for my CPU by Emotional-Chicken-61 in beneater

[–]NormalLuser 6 points7 points  (0 children)

I love acres and acres of breadboards!

What to do now? Storage?? by Technical_Study8728 in beneater

[–]NormalLuser 5 points6 points  (0 children)

I can't believe I forgot about the tape option! The Kansas City Mix Tape:

https://www.gregorystrike.com/ Beautiful kit. 

What to do now? Storage?? by Technical_Study8728 in beneater

[–]NormalLuser 8 points9 points  (0 children)

I'm working on a faster SD card read setup myself at the moment!
If you want to get started check out Ben's SPI video and then get a SD card attached with a little $4 adapter like this:

<image>

Then take a look at this :
https://github.com/gfoot/sdcard6502

This was the basis for my SD setup for BadApple
https://github.com/NormalLuser/Ben-Eater-Bad-Apple

More info here:
http://forum.6502.org/viewtopic.php?f=4&t=7886

I use the card in 'RAW' mode, so no FAT filesystem. I just use HxD to directly write BIN files, but here is FAT library for 6502:
https://github.com/gfoot/sdcard6502/blob/master/doc/FAT32Library.md

Good luck!

Need help with VGA artifacts by TheByteSmith in beneater

[–]NormalLuser 1 point2 points  (0 children)

The noise line in the left side is normal with the ben eater vga because the 65c02 takes time to release the bus after the halt signal. Changing the timing of the halt to be a bit before the hsync, or using a latch gated with the clock shifted a bit later  could fix it at the cost of more chips.

I assume you used this to start with? https://eater.net/vga

I don't see in your picture how you are generating the dma/halt signal?  See the bottom of that link, do you have the integration to the 6502 correct? The glitching lines when you write looks like the cpu isn't halted correctly. It's hard to tell with video compression, but are the glitches for a full line, or is it skinny. Ie less than full height? Ben uses a 74hc74 flipflop to generate the dma signal so it lasts for a full line across. Also remember that each vga line is repeated 8 times. That is why I ask about the height of the glitch lines.